From nobody Sun May 24 21:39:22 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E454437CD4D; Thu, 21 May 2026 09:50:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779357039; cv=none; b=vAIhmu28u8q1U7n37s/GJxTFOcsFYbbuCiLJ7ZOwJsr0GjSXpEjBOxmnzoK0TiE2IXC+E1k9UQsFvU7FzeulbKsia/ncNNvq9QyNPMsjor96rzmmSwP7mML8AGFpInzCCjaLsPSLg9qJEDcZ5roSZMcbsAbyCua6Cov6xKS2aNM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779357039; c=relaxed/simple; bh=erv3L80Zv4xT/TKm2bq3K0jVZ3V1GubUgS4GxT6EtVo=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=TDvh2m1S/Cde4yJ6BvAax8x/jJ1xaCOi2GqciL47A9IePE2gfeoPY1Ii0VW39YXSg/bh41QoPcp8wiPLa1vllYKCKQmlsHjo5rlJKltZxzLAo+wrTbH6beMeb9mTnaXWfuJZKU/ayiiuKtchd1jMfTgJ3FpdDaOe2Qqt2SjsR94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CesTuCWf; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=zM7D/WYd; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CesTuCWf"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="zM7D/WYd" Date: Thu, 21 May 2026 09:50:34 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1779357036; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=AHvp3Uloo/UQW8mbAGNeeFJJ0kHKu3pV7YlNPcaoJC8=; b=CesTuCWf1EKg+uwF9o/jrEh/83RV75S0Dz15Hh/YT3ALn4Pfeb6S6hpSFKemNxC831yogj 8o90kgHgaRJhqfGz98RV7adItLEfswmLYL+yumAuX1j83eJ+NlzQ291YautjDsKr4cch9z wUn92uz5w4GHpHBQqWKKa7MNp57GdhsSMGWTPv0E4yfS12pVchi/9OVX+tL7k4ZIELdHsu jaf88LSqXmMzLPR7BlZVnXZaTj3+Z47BAxd7WdW9xPayHJ/rOXhOpo6z8oucutp4zDmefq qCudAuoStRXA6BaVDjlzG3OdHFgT4xT+1ecYGE84pTfA9+8h2QF6LG7M1P3xXg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1779357036; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=AHvp3Uloo/UQW8mbAGNeeFJJ0kHKu3pV7YlNPcaoJC8=; b=zM7D/WYd+FHg9Og3ykMjprcYuAE53T9SpxNMIpYGVex3beHfGW9HlJr5OF1zVp1nWoGAeW jHOgci2VIy3Ab1CQ== From: "tip-bot2 for Marek Szyprowski" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/urgent] irqchip/exynos-combiner: Switch to raw_spinlock Cc: Marek Szyprowski , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177935703488.711.2991010042324584225.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/urgent branch of tip: Commit-ID: 96031b31a4b3b6ec836b9fe7be8f6e6ebcfe8d67 Gitweb: https://git.kernel.org/tip/96031b31a4b3b6ec836b9fe7be8f6e6eb= cfe8d67 Author: Marek Szyprowski AuthorDate: Thu, 21 May 2026 00:04:22 +02:00 Committer: Thomas Gleixner CommitterDate: Thu, 21 May 2026 11:48:30 +02:00 irqchip/exynos-combiner: Switch to raw_spinlock The exynos-combiner driver uses a regular spinlock to protect access to the combiner interrupt status register in combiner_handle_cascade_irq(), which is invoked in hard interrupt context as a chained interrupt handler. When PREEMPT_RT is enabled on ARM, regular spinlock is converted to a sleeping lock (mutex-based), which must not be used in atomic context such as hard interrupt handlers. Switch the irq_controller_lock to raw_spinlock, which remains a true non-sleeping spinlock even under PREEMPT_RT. Fixes: a900e5d99718 ("ARM: exynos: move exynos4210-combiner to drivers/irqc= hip") Signed-off-by: Marek Szyprowski Signed-off-by: Thomas Gleixner --- drivers/irqchip/exynos-combiner.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-com= biner.c index 11d1054..03cafcc 100644 --- a/drivers/irqchip/exynos-combiner.c +++ b/drivers/irqchip/exynos-combiner.c @@ -24,7 +24,7 @@ =20 #define IRQ_IN_COMBINER 8 =20 -static DEFINE_SPINLOCK(irq_controller_lock); +static DEFINE_RAW_SPINLOCK(irq_controller_lock); =20 struct combiner_chip_data { unsigned int hwirq_offset; @@ -72,9 +72,9 @@ static void combiner_handle_cascade_irq(struct irq_desc *= desc) =20 chained_irq_enter(chip, desc); =20 - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); status =3D readl_relaxed(chip_data->base + COMBINER_INT_STATUS); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); status &=3D chip_data->irq_mask; =20 if (status =3D=3D 0)