From nobody Mon May 25 00:08:58 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 862413DDDDB; Wed, 20 May 2026 08:34:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779266086; cv=none; b=KIYobAQgysVoroTMhbeUfWF3Ea1Q4IQvr91MbvHeM+lyFdOj/ltsQj3+NuSxCdBZhBWp/tkgwIGXd2CWA2ZYT7nmYTSSe0TuUDn8mYoKGFRjmk2VlLcl8LPtSYjNrN1gYV7Nc9YFb8573f5TPHQ5fDkXlLcZY84Zeec/r8sIBH8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779266086; c=relaxed/simple; bh=UyYyOqmU7sEV/9qatAuCWAnO+XR3BAkL7tdSMoVGBHA=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=D5VubDtpLc7zYBtP1WR2qpBpEmcOdUY0yJA3d/WkFYJzjhU27ut9SLoySinYUHQhZ5RF5c/lTtvzfnLeOoDyuby62rGPiSzIiGN6wq4tF1L32d+ijyOgtPsx+Y+N/iHdH2rtga9fWJpK5/WgyMJjeAozEMovkTK5v437EmGyl8s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Vy4Fx9+a; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=h/EdIC/z; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Vy4Fx9+a"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="h/EdIC/z" Date: Wed, 20 May 2026 08:34:41 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1779266083; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=A15aQL9o5lkllOYHIUfcaQeG6fhH9fzbgSFh/0k9Wo0=; b=Vy4Fx9+aYHShJxbBG5VUy2jNzssbvEbp3LFS4uWI6v+AjuhEepeUuMf4lZPg4WvazwaSju uifY4iSLE6ahu22yxkUgvPQNxjOO082HEngvU+wdCk3qfpexqbc26Ks1kV31UhaVxhF1zw FR8WsCaVp66tiP9H9YdqOceEWOHpdetw6bCOlz74QS51AqBTVDlUItk3iONuQ6maypUu0q 9sbT2M3xAgmIGsVLKhsVuEeyPKKgo/IAk820WwO7fILVToPDv08omJTZULSmfdUQF3g3HO I8TYuTNwB188Drz6bw+LVhFIxq8a2prSzy+tbTiNWRCcCr7Sg68E61J99xZhXg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1779266083; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=A15aQL9o5lkllOYHIUfcaQeG6fhH9fzbgSFh/0k9Wo0=; b=h/EdIC/z1JsCBfWmxMRXnCXw+FTBLnmQG+44e+MRKVvCOFLXKzA9ELlkOWeHRnfJ4URq9G wBQ71lYgCWYja/Ag== From: "tip-bot2 for Chen Yu" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: sched/core] sched/cache: Allow the user space to turn on and off cache aware scheduling Cc: "Peter Zijlstra (Intel)" , Chen Yu , Tim Chen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: =?utf-8?q?=3C0aa56f7fc48db2f8f700cd1aa34dedd0ec88351b=2E1775065?= =?utf-8?q?312=2Egit=2Etim=2Ec=2Echen=40linux=2Eintel=2Ecom=3E?= References: =?utf-8?q?=3C0aa56f7fc48db2f8f700cd1aa34dedd0ec88351b=2E17750653?= =?utf-8?q?12=2Egit=2Etim=2Ec=2Echen=40linux=2Eintel=2Ecom=3E?= Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177926608174.711.7558101803576668182.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the sched/core branch of tip: Commit-ID: 067a3135814334a8ea7241faef364cc48c6340bc Gitweb: https://git.kernel.org/tip/067a3135814334a8ea7241faef364cc48= c6340bc Author: Chen Yu AuthorDate: Wed, 01 Apr 2026 14:52:31 -07:00 Committer: Peter Zijlstra CommitterDate: Thu, 09 Apr 2026 15:49:52 +02:00 sched/cache: Allow the user space to turn on and off cache aware scheduling Provide a debugfs directory llc_balancing, and a knob named "enabled" under it to allow the user to turn off and on the cache aware scheduling at runtime. Suggested-by: Peter Zijlstra (Intel) Signed-off-by: Chen Yu Signed-off-by: Tim Chen Signed-off-by: Peter Zijlstra (Intel) Link: https://patch.msgid.link/0aa56f7fc48db2f8f700cd1aa34dedd0ec88351b.177= 5065312.git.tim.c.chen@linux.intel.com --- kernel/sched/debug.c | 48 +++++++++++++++++++++++++++++- kernel/sched/sched.h | 7 +++- kernel/sched/topology.c | 65 ++++++++++++++++++++++++++++++++++++++++- 3 files changed, 118 insertions(+), 2 deletions(-) diff --git a/kernel/sched/debug.c b/kernel/sched/debug.c index 74c1617..2eae67c 100644 --- a/kernel/sched/debug.c +++ b/kernel/sched/debug.c @@ -210,6 +210,46 @@ static const struct file_operations sched_scaling_fops= =3D { .release =3D single_release, }; =20 +#ifdef CONFIG_SCHED_CACHE +static ssize_t +sched_cache_enable_write(struct file *filp, const char __user *ubuf, + size_t cnt, loff_t *ppos) +{ + bool val; + int ret; + + ret =3D kstrtobool_from_user(ubuf, cnt, &val); + if (ret) + return ret; + + sysctl_sched_cache_user =3D val; + + sched_cache_active_set_unlocked(); + + return cnt; +} + +static int sched_cache_enable_show(struct seq_file *m, void *v) +{ + seq_printf(m, "%d\n", sysctl_sched_cache_user); + return 0; +} + +static int sched_cache_enable_open(struct inode *inode, + struct file *filp) +{ + return single_open(filp, sched_cache_enable_show, NULL); +} + +static const struct file_operations sched_cache_enable_fops =3D { + .open =3D sched_cache_enable_open, + .write =3D sched_cache_enable_write, + .read =3D seq_read, + .llseek =3D seq_lseek, + .release =3D single_release, +}; +#endif + #ifdef CONFIG_PREEMPT_DYNAMIC =20 static ssize_t sched_dynamic_write(struct file *filp, const char __user *u= buf, @@ -593,7 +633,7 @@ static void debugfs_ext_server_init(void) =20 static __init int sched_init_debug(void) { - struct dentry __maybe_unused *numa; + struct dentry __maybe_unused *numa, *llc; =20 debugfs_sched =3D debugfs_create_dir("sched", NULL); =20 @@ -626,6 +666,12 @@ static __init int sched_init_debug(void) debugfs_create_u32("hot_threshold_ms", 0644, numa, &sysctl_numa_balancing= _hot_threshold); #endif /* CONFIG_NUMA_BALANCING */ =20 +#ifdef CONFIG_SCHED_CACHE + llc =3D debugfs_create_dir("llc_balancing", debugfs_sched); + debugfs_create_file("enabled", 0644, llc, NULL, + &sched_cache_enable_fops); +#endif + debugfs_create_file("debug", 0444, debugfs_sched, NULL, &sched_debug_fops= ); =20 debugfs_fair_server_init(); diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index 71f6077..f499d5d 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -4070,11 +4070,16 @@ static inline void mm_cid_switch_to(struct task_str= uct *prev, struct task_struct =20 #ifdef CONFIG_SCHED_CACHE DECLARE_STATIC_KEY_FALSE(sched_cache_present); +DECLARE_STATIC_KEY_FALSE(sched_cache_active); +extern int sysctl_sched_cache_user; =20 static inline bool sched_cache_enabled(void) { - return static_branch_unlikely(&sched_cache_present); + return static_branch_unlikely(&sched_cache_active); } + +extern void sched_cache_active_set_unlocked(void); + #endif =20 void sched_domains_free_llc_id(int cpu); diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 6a36f8f..9fc9934 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -821,7 +821,16 @@ enum s_alloc { }; =20 #ifdef CONFIG_SCHED_CACHE +/* hardware support for cache aware scheduling */ DEFINE_STATIC_KEY_FALSE(sched_cache_present); +/* + * Indicator of whether cache aware scheduling + * is active, used by the scheduler. + */ +DEFINE_STATIC_KEY_FALSE(sched_cache_active); +/* user wants cache aware scheduling [0 or 1] */ +int sysctl_sched_cache_user =3D 1; + static bool alloc_sd_llc(const struct cpumask *cpu_map, struct s_data *d) { @@ -856,6 +865,60 @@ err: =20 return false; } + +static void _sched_cache_active_set(bool enable, bool locked) +{ + if (enable) { + if (locked) + static_branch_enable_cpuslocked(&sched_cache_active); + else + static_branch_enable(&sched_cache_active); + } else { + if (locked) + static_branch_disable_cpuslocked(&sched_cache_active); + else + static_branch_disable(&sched_cache_active); + } +} + +/* + * Enable/disable cache aware scheduling according to + * user input and the presence of hardware support. + */ +static void sched_cache_active_set(bool locked) +{ + /* hardware does not support */ + if (!static_branch_likely(&sched_cache_present)) { + _sched_cache_active_set(false, locked); + return; + } + + /* + * user wants it or not ? + * TBD: read before writing the static key. + * It is not in the critical path, leave as-is + * for now. + */ + if (sysctl_sched_cache_user) { + _sched_cache_active_set(true, locked); + if (sched_debug()) + pr_info("%s: enabling cache aware scheduling\n", __func__); + } else { + _sched_cache_active_set(false, locked); + if (sched_debug()) + pr_info("%s: disabling cache aware scheduling\n", __func__); + } +} + +static void sched_cache_active_set_locked(void) +{ + return sched_cache_active_set(true); +} + +void sched_cache_active_set_unlocked(void) +{ + return sched_cache_active_set(false); +} #else static bool alloc_sd_llc(const struct cpumask *cpu_map, struct s_data *d) @@ -2926,6 +2989,8 @@ error: static_branch_enable_cpuslocked(&sched_cache_present); else static_branch_disable_cpuslocked(&sched_cache_present); + + sched_cache_active_set_locked(); #endif __free_domain_allocs(&d, alloc_state, cpu_map); =20