From nobody Fri Jun 12 13:59:11 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA82A42B73B; Thu, 14 May 2026 15:10:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771422; cv=none; b=F3UNkFMM1i0mQ3DcdivrneEJZGEZQ3bC/KipjYdL6j1SmZV1oDNEVWXm4RqHtT6VYxc0RXvJNtrceRoGiTS5mHMtmzsbOvWh7f6RQFgItkqXJa2H3KHsni6Yqu1e7QAIsYngvPDUdPqmYEu+s8PsH/pDSlnok3a0/aTFKxfmztg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771422; c=relaxed/simple; bh=MVgYMgm0PHB6SlTQcqGZ4O2tUrmIrepMJl+v4Sx/RQo=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=jVNumGIrEAp9/koTJpVyzLcIXC53iSsbpTqC8qdmcatoRlVj0IT5/26rffdMyvh1n7sHarllC+heU9HQ0+Fbe1+7lOk1aKAAH9iw6dvHIKFPmYd8/YC7SbPbrDVJCRdwbBBZMNsQq8JAOdjmN0LpS380PZOduoPEWlScl1WhXgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=FarDjhTE; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=W5XLzLGq; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="FarDjhTE"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="W5XLzLGq" Date: Thu, 14 May 2026 15:10:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1778771409; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=dgAndkHA4sdyEx/pT8Z7LYPhbsxjsex+WWDq8Qv85+Y=; b=FarDjhTEcS6g1nwZxmoK5C3pwDWULtcG2YyqFv8tIWb7F3EXgJJEQ4vJXSlDzEWkfxWQ0j uyhGp3kRAKBQOGOzFe08+hlxsPwsYQbXssP1TSuhVIXEHUlMfEzUYtqWggqfvaK+/KnlUh jYE8nocO7/3drP1S9INe+YDto8hNU5P+qL/VLlJKoQAmbxVuZ7EuxqcWWOx+Mn5Gy5vZk7 ZJnkGJdZxVEzVvqgDK2VgHHhLmbRvdBdaWGBvRCtSOLh0SDy26GYtiZ86XiIk1+/VPwAPq zLXaDgonnqAnnLfF4zrqNELpZbwCvRfeAj5pvqQvrBxUOijyzRbPaotJ68ufMg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1778771409; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=dgAndkHA4sdyEx/pT8Z7LYPhbsxjsex+WWDq8Qv85+Y=; b=W5XLzLGq3ieCmjwGVr0YRnNtiftvFIEJn+4JUT/h2V/cEQiNMVSXO94DfNNSgrXdw5ga3L 4Q6yuelG+sFGOpCg== From: "tip-bot2 for Borislav Petkov (AMD)" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: ras/urgent] x86/mce: Restore MCA polling interval halving Cc: Li RongQing , "Borislav Petkov (AMD)" , Qiuxu Zhuo , x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177877140791.188840.10760375745994449816.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the ras/urgent branch of tip: Commit-ID: ea324444ece9f301b5c4ff71b258cc68990c4d61 Gitweb: https://git.kernel.org/tip/ea324444ece9f301b5c4ff71b258cc689= 90c4d61 Author: Borislav Petkov (AMD) AuthorDate: Mon, 16 Mar 2026 16:12:00 +01:00 Committer: Borislav Petkov (AMD) CommitterDate: Wed, 13 May 2026 17:38:35 +02:00 x86/mce: Restore MCA polling interval halving RongQing reported that the MCA polling interval doesn't halve when an error gets logged. It was traced down to the commit in Fixes:, because: mce_timer_fn() |-> mce_poll_banks() |-> machine_check_poll() |-> mce_log() which will queue the work and return. Now, back in mce_timer_fn(): /* * Alert userspace if needed. If we logged an MCE, reduce the polli= ng * interval, otherwise increase the polling interval. */ if (mce_notify_irq()) <--- here we haven't ran the notifier chain yet so mce_need_notify is not set yet so this won't hit and we won't halve the interval iv. Now the notifier chain runs. mce_early_notifier() sets the bit, does mce_notify_irq(), that clears the bit and then the notifier chain a little later logs the error. So this is a silly timing issue. But, that's all unnecessary. All it needs to happen here is, the "should we notify of a logged MCE" mce_notify_irq() asks, should be simply a question to the mce gen pool: "Are you empty?" And that then turns into a simple yes or no answer and it all JustWorks(tm). So do that and also distribute the functionality where it belongs: - Print that MCE events have been logged in mce_log() - Trigger the mcelog tool specific work in the first notifier As a result, mce_notify_irq() can go now. Fixes: 011d82611172 ("RAS: Add a Corrected Errors Collector") Reported-by: Li RongQing Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Qiuxu Zhuo Tested-by: Qiuxu Zhuo Link: https://lore.kernel.org/r/20260112082747.2842-1-lirongqing@baidu.com --- arch/x86/kernel/cpu/mce/core.c | 33 +++++---------------------------- 1 file changed, 5 insertions(+), 28 deletions(-) diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index 8dd424a..f3a793e 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -90,7 +90,6 @@ struct mca_config mca_cfg __read_mostly =3D { }; =20 static DEFINE_PER_CPU(struct mce_hw_err, hw_errs_seen); -static unsigned long mce_need_notify; =20 /* * MCA banks polled by the period polling timer for corrected events. @@ -152,8 +151,10 @@ EXPORT_PER_CPU_SYMBOL_GPL(injectm); =20 void mce_log(struct mce_hw_err *err) { - if (mce_gen_pool_add(err)) + if (mce_gen_pool_add(err)) { + pr_info(HW_ERR "Machine check events logged\n"); irq_work_queue(&mce_irq_work); + } } EXPORT_SYMBOL_GPL(mce_log); =20 @@ -585,28 +586,6 @@ bool mce_is_correctable(struct mce *m) } EXPORT_SYMBOL_GPL(mce_is_correctable); =20 -/* - * Notify the user(s) about new machine check events. - * Can be called from interrupt context, but not from machine check/NMI - * context. - */ -static bool mce_notify_irq(void) -{ - /* Not more than two messages every minute */ - static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2); - - if (test_and_clear_bit(0, &mce_need_notify)) { - mce_work_trigger(); - - if (__ratelimit(&ratelimit)) - pr_info(HW_ERR "Machine check events logged\n"); - - return true; - } - - return false; -} - static int mce_early_notifier(struct notifier_block *nb, unsigned long val, void *data) { @@ -618,9 +597,7 @@ static int mce_early_notifier(struct notifier_block *nb= , unsigned long val, /* Emit the trace record: */ trace_mce_record(err); =20 - set_bit(0, &mce_need_notify); - - mce_notify_irq(); + mce_work_trigger(); =20 return NOTIFY_DONE; } @@ -1804,7 +1781,7 @@ static void mce_timer_fn(struct timer_list *t) * Alert userspace if needed. If we logged an MCE, reduce the polling * interval, otherwise increase the polling interval. */ - if (mce_notify_irq()) + if (!mce_gen_pool_empty()) iv =3D max(iv / 2, (unsigned long) HZ/100); else iv =3D min(iv * 2, round_jiffies_relative(check_interval * HZ));