From nobody Sat Jun 13 18:12:52 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F5C430E0F1; Wed, 6 May 2026 06:16:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778048215; cv=none; b=cWm4WfEv1NJqxv01EdSWkXtXcm0opWLeb48ROjjZ4wV5sAL21ioEu4pKGAfk+MDMMbkDdQld9eamAvMqzMjpZDeQFmEUaHgN2zG1PqUC7d4eY1nezG3Wk7zmSrp4fXgtg7q3apArct7zXUk3GfAPiKktbCGT9QFSWS26TDOY7xQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778048215; c=relaxed/simple; bh=jt6IOWA9o7WgqlsupBhN0vqep0hdFYGqBXwfnP0X+nk=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=ao/6/8xjW/Bu78knCTYiv90/vktydOppTtn2sjpRfhzEO0iAQyUW/rjDjcNsH59OFf0fFIPx4ZhU+wPY9ggAL26KuGpcjYFAktuKfQxg0OkmUdoMkoysKepJaxO6AZBihEWmPeqXOoBPtJV2I6WadPlVK+FRt9nmHcVEE+CkUa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=is0o3ONG; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=0mFqEG8q; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="is0o3ONG"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="0mFqEG8q" Date: Wed, 06 May 2026 06:16:51 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1778048212; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=iZYcKH70RK5Lq8RO2OUjxpT8Np5BVCMbr5E+eMeyQ/c=; b=is0o3ONGCsnyqH9eRr3ImxX0sbFNkNkB5hl58qEXTiF3+BWjDhvQqG1vYtaoTU+XR4kAWB eSn399yTyBcD87bcx7Q18KiEODBeY1F5SR5KYs37WGxKHu/n5iEIr5MF9kZQFLwk2tIOHw T9TLdtuLQyAhb8kxu/p9XHdGil7EVA8CauID6CI8XeT5hFVvCnIgg6ylxfzXgebDUeZpwX PVJX9OGWC3/ns/WsuBixfX5M4oJi54CbiIa7bb4XNa8beSGvUgoqYCb73I+DZsqVibU0s5 roD/ER5OE3DlXpKmhUrQSkRznKVCzpop4IvIBZWjrg2FSIS8jR3IEOqIoB78QA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1778048212; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=iZYcKH70RK5Lq8RO2OUjxpT8Np5BVCMbr5E+eMeyQ/c=; b=0mFqEG8q//v2qhSjwUvn/0s75+9MB6DKcWBhMhfPaqzezM8sKqDXiNYW2j9qkv8tRCRCM5 4jZUxC2AqMpBBbBg== From: "tip-bot2 for Ingo Molnar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/cpu: Remove CONFIG_MWINCHIP3D/MWINCHIPC6 Cc: Ingo Molnar , Arnd Bergmann , Dave Hansen , Linus Torvalds , x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177804821164.424702.11168377408214212937.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: aaa3c14d11345f330f32ef4e837923d0932a809d Gitweb: https://git.kernel.org/tip/aaa3c14d11345f330f32ef4e837923d09= 32a809d Author: Ingo Molnar AuthorDate: Fri, 25 Apr 2025 10:41:59 +02:00 Committer: Ingo Molnar CommitterDate: Wed, 06 May 2026 07:59:54 +02:00 x86/cpu: Remove CONFIG_MWINCHIP3D/MWINCHIPC6 These CPUs lack CMPXCHG8B support, according to Arnd Bergmann: | "Winchip6 (486-class, no tsc, no cx8) and Winchip3D | (486-class, with tsc but no cx8)" Any still available derivatives, if they have TSC and CX8 support, would work with regular Pentium builds, there's no need to have a separate build option for them. Signed-off-by: Ingo Molnar Reviewed-by: Arnd Bergmann Acked-by: Dave Hansen Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250425084216.3913608-3-mingo@kernel.org --- arch/x86/Kconfig.cpu | 28 ++++------------------------ arch/x86/Makefile_32.cpu | 2 -- arch/x86/include/asm/vermagic.h | 4 ---- 3 files changed, 4 insertions(+), 30 deletions(-) diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index d7ba921..8868aa1 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -32,8 +32,6 @@ choice - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). - "Crusoe" for the Transmeta Crusoe series. - "Efficeon" for the Transmeta Efficeon series. - - "Winchip-C6" for original IDT Winchip. - - "Winchip-2" for IDT Winchips with 3dNow! capabilities. - "AMD Elan" for the 32-bit AMD Elan embedded CPU. - "GeodeGX1" for Geode GX1 (Cyrix MediaGX). - "Geode GX/LX" For AMD Geode GX and LX processors. @@ -155,24 +153,6 @@ config MEFFICEON help Select this for a Transmeta Efficeon processor. =20 -config MWINCHIPC6 - bool "Winchip-C6" - depends on X86_32 - help - Select this for an IDT Winchip C6 chip. Linux and GCC - treat this chip as a 586TSC with some extended instructions - and alignment requirements. - -config MWINCHIP3D - bool "Winchip-2/Winchip-2A/Winchip-3" - depends on X86_32 - help - Select this for an IDT Winchip-2, 2A or 3. Linux and GCC - treat this chip as a 586TSC with some extended instructions - and alignment requirements. Also enable out of order memory - stores for this CPU, which can increase performance of some - operations. - config MGEODEGX1 bool "GeodeGX1" depends on X86_32 @@ -270,7 +250,7 @@ config X86_L1_CACHE_SHIFT default "7" if MPENTIUM4 default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X86_= 64 default "4" if MGEODEGX1 - default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIX= III || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M5= 86 || MVIAC3_2 || MGEODE_LX + default "5" if MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII ||= MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX =20 config X86_F00F_BUG def_bool y @@ -282,7 +262,7 @@ config X86_INVD_BUG =20 config X86_ALIGNMENT_16 def_bool y - depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK6 || M586MMX || M58= 6TSC || M586 || MVIAC3_2 || MGEODEGX1 + depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || = MGEODEGX1 =20 config X86_INTEL_USERCOPY def_bool y @@ -290,7 +270,7 @@ config X86_INTEL_USERCOPY =20 config X86_USE_PPRO_CHECKSUM def_bool y - depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIU= M4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 = || MEFFICEON || MGEODE_LX || MATOM + depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMI= II || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX ||= MATOM =20 config X86_TSC def_bool y @@ -318,7 +298,7 @@ config X86_MINIMUM_CPU_FAMILY =20 config X86_DEBUGCTLMSR def_bool y - depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M= 586TSC || M586) && !UML + depends on !(MK6 || MCYRIXIII || M586MMX || M586TSC || M586) && !UML =20 config IA32_FEAT_CTL def_bool y diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu index 7c9898c..707827f 100644 --- a/arch/x86/Makefile_32.cpu +++ b/arch/x86/Makefile_32.cpu @@ -24,8 +24,6 @@ cflags-$(CONFIG_MK6) +=3D -march=3Dk6 cflags-$(CONFIG_MK7) +=3D -march=3Dathlon cflags-$(CONFIG_MCRUSOE) +=3D -march=3Di686 $(align) cflags-$(CONFIG_MEFFICEON) +=3D -march=3Di686 $(call tune,pentium3) $(alig= n) -cflags-$(CONFIG_MWINCHIPC6) +=3D $(call cc-option,-march=3Dwinchip-c6,-mar= ch=3Di586) -cflags-$(CONFIG_MWINCHIP3D) +=3D $(call cc-option,-march=3Dwinchip2,-march= =3Di586) cflags-$(CONFIG_MCYRIXIII) +=3D $(call cc-option,-march=3Dc3,-march=3Di486= ) $(align) cflags-$(CONFIG_MVIAC3_2) +=3D $(call cc-option,-march=3Dc3-2,-march=3Di68= 6) cflags-$(CONFIG_MVIAC7) +=3D -march=3Di686 diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagi= c.h index eda233a..b3a8beb 100644 --- a/arch/x86/include/asm/vermagic.h +++ b/arch/x86/include/asm/vermagic.h @@ -31,10 +31,6 @@ #define MODULE_PROC_FAMILY "CRUSOE " #elif defined CONFIG_MEFFICEON #define MODULE_PROC_FAMILY "EFFICEON " -#elif defined CONFIG_MWINCHIPC6 -#define MODULE_PROC_FAMILY "WINCHIPC6 " -#elif defined CONFIG_MWINCHIP3D -#define MODULE_PROC_FAMILY "WINCHIP3D " #elif defined CONFIG_MCYRIXIII #define MODULE_PROC_FAMILY "CYRIXIII " #elif defined CONFIG_MVIAC3_2