From nobody Tue Jun 16 17:03:49 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A92A23D75C2; Thu, 30 Apr 2026 10:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777546610; cv=none; b=OiMXbXVmdpvuEZ8uY0ynk2hZcEQp6ZG75DWSTASUdXq55PtRVkacOqSHAblvI6evPiFcmesKpgBFNtG4W4fv+wzioO+ejfpRe2RrRBGYJsN1vB5l2zdwV6wTMmQFDeGmhSWjo4Pi+jmCN7PHSDIsKPltAkNlsD1CnPs4budEUaU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777546610; c=relaxed/simple; bh=z63TIfm64mO3Vw85vavPbjKO2VASiTdHt6YzY1H9QXI=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=D+Gq3+M8ws7OROXQeqHOYSAmz5yFLiTRcX5apWashNOQOBPmKomRicwdmGI7bKC6pCdNnwQ8snWhF5vycE/fzx/sLZszcinCpe+u1VTYPtZRiXSrdz6Hgp4ZCejH6krn4cePGTOcT4YmhtwgFuF5IclTva8J4vDwu5Xxh+HyPXY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=md6MTZet; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=y7QJKoOJ; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="md6MTZet"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="y7QJKoOJ" Date: Thu, 30 Apr 2026 10:56:45 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1777546607; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BZMDoqk/7dASrBdYQ/j6jvtpr42GLC8bq2jauwB6vog=; b=md6MTZetOFzz33Xg/roAFCPVIV5TIZS2bhoBISEiHchDN7dmPLvG3w2xdbrZ8KSwYb6zjR jYg6mf5boMPmIGF+54+ZN/Y9XkBxinxt9U1yUroL49cTEM+5wEbkNpTB7qpKvJPI9UWKKo O2sEsrhtr10kyWj+ubttq3i2UEkD659xsk1BgW7/BqRytC1myJg5jaLZGhIqIYuel4kQ9y wGKKY13uJxk5DrHC2o8rpCw4T6aryogyp0JM+MfUPMGWgnKZm/uSwgmMpPaTFYTiwyRuQg tu9gQK8+rub5C13xM+be0R5RSr+SzoTa4JNPPeLrV89bB3ReRoXzKL7+M7nwww== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1777546607; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BZMDoqk/7dASrBdYQ/j6jvtpr42GLC8bq2jauwB6vog=; b=y7QJKoOJz0FxwaOg3ntldDkDhc3HKzyJ1UMHeQCOtLqLLEeMGPsuoqSeOvg6jSuNf5s34l 5l5mFI4J8+0vHUDg== From: "tip-bot2 for Changhuang Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] dt-bindings: interrupt-controller: Repurpose binding for unreleased jh8100 for jhb100 Cc: Changhuang Liang , Thomas Gleixner , Conor Dooley , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260416064751.632138-2-changhuang.liang@starfivetech.com> References: <20260416064751.632138-2-changhuang.liang@starfivetech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177754660583.3521451.10638222872461981434.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: a540d544db1c37d4c138b67384f235a85f79f060 Gitweb: https://git.kernel.org/tip/a540d544db1c37d4c138b67384f235a85= f79f060 Author: Changhuang Liang AuthorDate: Wed, 15 Apr 2026 23:47:47 -07:00 Committer: Thomas Gleixner CommitterDate: Thu, 30 Apr 2026 12:53:04 +02:00 dt-bindings: interrupt-controller: Repurpose binding for unreleased jh8100 = for jhb100 The StarFive JH8100 SoC was discontinued before production. The newly taped-out JHB100 SoC uses the same interrupt controller IP. Rename the binding file, compatible string, and MAINTAINERS entry from "jh8100" to "jhb100". In JHB100 SoC, The clocks and resets are not operated by users, but they exist in the hardware. Mark them as optional. Signed-off-by: Changhuang Liang Signed-off-by: Thomas Gleixner Acked-by: Conor Dooley Link: https://patch.msgid.link/20260416064751.632138-2-changhuang.liang@sta= rfivetech.com --- Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-int= c.yaml | 61 ------------------------------------------------------------- Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-int= c.yaml | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ MAINTAINERS = | 2 +- 3 files changed, 50 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/= starfive,jh8100-intc.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= starfive,jhb100-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/starfiv= e,jh8100-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller= /starfive,jh8100-intc.yaml deleted file mode 100644 index ada5788..0000000 --- a/Documentation/devicetree/bindings/interrupt-controller/starfive,jh810= 0-intc.yaml +++ /dev/null @@ -1,61 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-in= tc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: StarFive External Interrupt Controller - -description: - StarFive SoC JH8100 contain a external interrupt controller. It can be u= sed - to handle high-level input interrupt signals. It also send the output - interrupt signal to RISC-V PLIC. - -maintainers: - - Changhuang Liang - -properties: - compatible: - const: starfive,jh8100-intc - - reg: - maxItems: 1 - - clocks: - description: APB clock for the interrupt controller - maxItems: 1 - - resets: - description: APB reset for the interrupt controller - maxItems: 1 - - interrupts: - maxItems: 1 - - interrupt-controller: true - - "#interrupt-cells": - const: 1 - -required: - - compatible - - reg - - clocks - - resets - - interrupts - - interrupt-controller - - "#interrupt-cells" - -additionalProperties: false - -examples: - - | - interrupt-controller@12260000 { - compatible =3D "starfive,jh8100-intc"; - reg =3D <0x12260000 0x10000>; - clocks =3D <&syscrg_ne 76>; - resets =3D <&syscrg_ne 13>; - interrupts =3D <45>; - interrupt-controller; - #interrupt-cells =3D <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/starfiv= e,jhb100-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller= /starfive,jhb100-intc.yaml new file mode 100644 index 0000000..d8a0a38 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/starfive,jhb10= 0-intc.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/starfive,jhb100-in= tc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive External Interrupt Controller + +description: + StarFive SoC JHB100 contain a external interrupt controller. It can be u= sed + to handle high-level input interrupt signals. It also send the output + interrupt signal to RISC-V PLIC. + +maintainers: + - Changhuang Liang + +properties: + compatible: + const: starfive,jhb100-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + interrupt-controller@12260000 { + compatible =3D "starfive,jhb100-intc"; + reg =3D <0x12260000 0x10000>; + interrupts =3D <45>; + interrupt-controller; + #interrupt-cells =3D <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 2fb1c75..30626d0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25536,7 +25536,7 @@ F: drivers/phy/starfive/phy-jh7110-usb.c STARFIVE JH8100 EXTERNAL INTERRUPT CONTROLLER DRIVER M: Changhuang Liang S: Supported -F: Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-= intc.yaml +F: Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-= intc.yaml F: drivers/irqchip/irq-starfive-jh8100-intc.c =20 STATIC BRANCH/CALL