From nobody Tue Jun 16 17:03:59 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12C393CAE74; Thu, 30 Apr 2026 10:56:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777546607; cv=none; b=KgHCS7JXGpnHoVl7CwgOOjNf8gvSJWc3DTn68XzJk5/egOo4nT1zP0URBOMRGogEHFC2zx57e09RuvT5WOiYv2gyz/4DN5SJWV3q9RAKlkpxOPJM8ECD3Q2utxQwrMUD1oJE3jqeOlCt7/EOPfw3bvdkoeqMouu1OCIsf698Nh4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777546607; c=relaxed/simple; bh=87iercx0UHZpkSmKyXzFPDLObQEsGTRAvCmboChf4PI=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=HxGzpmsTi3XlqfmFjRQsprndu/MczJf1O9K5M+/X8ln8ZRJh0mhzS9ZveiV/Q+aWZQI8gC4nql4Hs958v5pKnU+JAGetjZZTFs/XekAGx1knWD/b4UmvzaGEY5c0UubgPwgQKyGGxjm8UINAV9wYHeDWRIFgMNlhvqlnyiv+P7I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=auHZdlGE; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=sedtOFST; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="auHZdlGE"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="sedtOFST" Date: Thu, 30 Apr 2026 10:56:43 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1777546604; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PGp1c4mh7CYGhHMZrU5eyJ6t1I/Vwgw+TWD+eAA67+g=; b=auHZdlGELHdGM+WXkPcT/RtL9iAvI90PIIciaXbO5ajEL4ZrDGLpYb1qGSbUEHXmlCmK03 CNC5E/mvx0HI38hMLaYTZ3cwQRtZ1ueExYD28JzCWQ7hHRQ55X+X76teC35UvUitPbRpH/ yGTL7xIztC4w93YNHQKOyOqDhLTotYT55gFNH+MP7u4IOpu16/C/0sCKqpCShtkjASzBLX JtSjGa7hYxIUTX+KvWiJk1wkPEiN2MwGL3Kl60ZDVAqvvL3K9DZ0W8WAcJt+lDHwDOjmxi HOesZUMLSPyWrjOinpIap/aw2yo2jHV3kpaO+Y6k4DyaOTaJO5BcckFyIYeGDg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1777546604; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PGp1c4mh7CYGhHMZrU5eyJ6t1I/Vwgw+TWD+eAA67+g=; b=sedtOFSTS/1ORMAmnbhyC2aKPCBBLTF42e+HAXyi1bQ/5w97ZqJ3W2b65v6+1vap31mfxu HIhCGIMYLN+hUzDA== From: "tip-bot2 for Changhuang Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/starfive: Use devm_ interfaces to simplify resource release Cc: Changhuang Liang , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260416064751.632138-4-changhuang.liang@starfivetech.com> References: <20260416064751.632138-4-changhuang.liang@starfivetech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177754660321.3521451.17230126033632333020.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 2f59ca1854975170c25e8c812405aa309ea4f9f7 Gitweb: https://git.kernel.org/tip/2f59ca1854975170c25e8c812405aa309= ea4f9f7 Author: Changhuang Liang AuthorDate: Wed, 15 Apr 2026 23:47:49 -07:00 Committer: Thomas Gleixner CommitterDate: Thu, 30 Apr 2026 12:53:05 +02:00 irqchip/starfive: Use devm_ interfaces to simplify resource release Use devm_ interfaces to simplify resource release. Make clock and reset get optional as they are not used on the JHB100 SoC. Replace pr_ logging with dev_* logging. Use __free(kfree) cleanup attribute to auto-free irqc on error paths Signed-off-by: Changhuang Liang Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260416064751.632138-4-changhuang.liang@sta= rfivetech.com --- drivers/irqchip/irq-starfive-jhb100-intc.c | 77 +++++---------------- 1 file changed, 20 insertions(+), 57 deletions(-) diff --git a/drivers/irqchip/irq-starfive-jhb100-intc.c b/drivers/irqchip/i= rq-starfive-jhb100-intc.c index 2c9cdad..c33229b 100644 --- a/drivers/irqchip/irq-starfive-jhb100-intc.c +++ b/drivers/irqchip/irq-starfive-jhb100-intc.c @@ -7,16 +7,15 @@ * Author: Changhuang Liang */ =20 -#define pr_fmt(fmt) "irq-starfive-jhb100: " fmt - #include +#include #include #include #include #include #include -#include #include +#include #include #include =20 @@ -117,85 +116,49 @@ static void starfive_intc_irq_handler(struct irq_desc= *desc) static int starfive_intc_probe(struct platform_device *pdev, struct device= _node *parent) { struct device_node *intc =3D pdev->dev.of_node; - struct starfive_irq_chip *irqc; struct reset_control *rst; struct clk *clk; int parent_irq; - int ret; =20 - irqc =3D kzalloc_obj(*irqc); + struct starfive_irq_chip *irqc __free(kfree) =3D kzalloc_obj(*irqc); if (!irqc) return -ENOMEM; =20 - irqc->base =3D of_iomap(intc, 0); - if (!irqc->base) { - pr_err("Unable to map registers\n"); - ret =3D -ENXIO; - goto err_free; - } + irqc->base =3D devm_platform_ioremap_resource(pdev, 0); + if (!irqc->base) + return dev_err_probe(&pdev->dev, -ENXIO, "unable to map registers\n"); =20 - rst =3D of_reset_control_get_exclusive(intc, NULL); - if (IS_ERR(rst)) { - pr_err("Unable to get reset control %pe\n", rst); - ret =3D PTR_ERR(rst); - goto err_unmap; - } + rst =3D devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, = NULL); + if (IS_ERR(rst)) + return dev_err_probe(&pdev->dev, PTR_ERR(rst), + "Unable to get and deassert reset control\n"); =20 - clk =3D of_clk_get(intc, 0); - if (IS_ERR(clk)) { - pr_err("Unable to get clock %pe\n", clk); - ret =3D PTR_ERR(clk); - goto err_reset_put; - } + clk =3D devm_clk_get_optional_enabled(&pdev->dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk), "Unable to get and enable= clock\n"); =20 - ret =3D reset_control_deassert(rst); - if (ret) - goto err_clk_put; - - ret =3D clk_prepare_enable(clk); - if (ret) - goto err_reset_assert; =20 raw_spin_lock_init(&irqc->lock); =20 irqc->domain =3D irq_domain_create_linear(of_fwnode_handle(intc), STARFIV= E_INTC_SRC_IRQ_NUM, &starfive_intc_domain_ops, irqc); - if (!irqc->domain) { - pr_err("Unable to create IRQ domain\n"); - ret =3D -EINVAL; - goto err_clk_disable; - } + if (!irqc->domain) + return dev_err_probe(&pdev->dev, -EINVAL, "Unable to create IRQ domain\n= "); =20 parent_irq =3D of_irq_get(intc, 0); if (parent_irq < 0) { - pr_err("Failed to get main IRQ: %d\n", parent_irq); - ret =3D parent_irq; - goto err_remove_domain; + irq_domain_remove(irqc->domain); + return dev_err_probe(&pdev->dev, parent_irq, "Failed to get main IRQ\n"); } =20 irq_set_chained_handler_and_data(parent_irq, starfive_intc_irq_handler, irqc); =20 - pr_info("Interrupt controller register, nr_irqs %d\n", - STARFIVE_INTC_SRC_IRQ_NUM); + dev_info(&pdev->dev, "Interrupt controller register, nr_irqs %d\n", + STARFIVE_INTC_SRC_IRQ_NUM); =20 + retain_and_null_ptr(irqc); return 0; - -err_remove_domain: - irq_domain_remove(irqc->domain); -err_clk_disable: - clk_disable_unprepare(clk); -err_reset_assert: - reset_control_assert(rst); -err_clk_put: - clk_put(clk); -err_reset_put: - reset_control_put(rst); -err_unmap: - iounmap(irqc->base); -err_free: - kfree(irqc); - return ret; } =20 IRQCHIP_PLATFORM_DRIVER_BEGIN(starfive_intc)