From nobody Tue Apr 7 14:38:26 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A05533DCD88; Thu, 2 Apr 2026 11:52:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775130738; cv=none; b=NczzTJJKohUuyYqGVvDVC5HuLtCkM06fSPWDgWbJ3qmXsyKmZr2mU55DQuftcaYo9lHBqbp1sUXrj8O+abTNSPpmd4FR645zI3YiqTcDJA5cqRh4TFEisY8HveUu8g+qpaGykwB96aIsvubGSjEibU0D5mnNZxWHkI9Uo7iBDgU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775130738; c=relaxed/simple; bh=YWBmMRLcSgRdCrguoaQSvOFL9cR8F9thrBlbqapuVbQ=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=IbyKkbkqp93jaQ7q4gNqNcpE2c+5Yt/019H8IluVv3pRwHzFCevz1ng3w0ubd3eZ310mE+TANUsRJlX/L/sCRRnuw1uX0WLcw+aufvv/6fpWeM6eAjRC4ivp2jQ7oxYnRrBM4l7Mg2aXBjMxbqG3Yir5/sKG3N+qDU0w0QCGUIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=JV27LTBH; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=NdT0J9ZW; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="JV27LTBH"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="NdT0J9ZW" Date: Thu, 02 Apr 2026 11:52:03 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1775130725; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uNOP8gyBaSdih7J/RUZLinrzYeXxc992aV37xlSZZ2U=; b=JV27LTBHKXvzGtB8ZaAcXPCzaMnQNvp0B57Pu/io5wzwQLfSiGor373zYs/tEAVRSD+6nh 4zzCoK9CxauoMREfpqk5JceSJR1gvKnRalBoWq8bAyf5BKE1snGmOGSyieUv342hm7m3R0 4KlPXcmbEkhrvPpxeaXi8vnw1NVNWKBEVXjrAvOwovQ4VUSBOxGN/+FK3BBjHZIuBQLJvo E2d49n4puoszmizXJqvW2idMpSiKU8hE16Bo+cikTtbThC95t/GQJ9yL29gohGdRrl8vsU KJjXKOKsvmTnjixhkmJOKcwgd/zAOieqSYLs1J2Y0rhIT6FD1xotkcrBKa+fCw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1775130725; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uNOP8gyBaSdih7J/RUZLinrzYeXxc992aV37xlSZZ2U=; b=NdT0J9ZWhON+NYot0vHqXkYAUl0+XiOTLf83hupdI0wkP2ViiIBHJRkiP6aIl73J9CmSah 7c0KNzXw2YCHDZBQ== From: "tip-bot2 for Ian Rogers" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/urgent] perf/x86: Fix potential bad container_of in intel_pmu_hw_config Cc: Ian Rogers , "Peter Zijlstra (Intel)" , Thomas Falcon , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260312194305.1834035-1-irogers@google.com> References: <20260312194305.1834035-1-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177513072341.1647592.814865140300554295.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the perf/urgent branch of tip: Commit-ID: dbde07f06226438cd2cf1179745fa1bec5d8914a Gitweb: https://git.kernel.org/tip/dbde07f06226438cd2cf1179745fa1bec= 5d8914a Author: Ian Rogers AuthorDate: Thu, 12 Mar 2026 12:43:05 -07:00 Committer: Peter Zijlstra CommitterDate: Thu, 02 Apr 2026 13:49:16 +02:00 perf/x86: Fix potential bad container_of in intel_pmu_hw_config Auto counter reload may have a group of events with software events present within it. The software event PMU isn't the x86_hybrid_pmu and a container_of operation in intel_pmu_set_acr_caused_constr (via the hybrid helper) could cause out of bound memory reads. Avoid this by guarding the call to intel_pmu_set_acr_caused_constr with an is_x86_event check. Fixes: ec980e4facef ("perf/x86/intel: Support auto counter reload") Signed-off-by: Ian Rogers Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Thomas Falcon Link: https://patch.msgid.link/20260312194305.1834035-1-irogers@google.com --- arch/x86/events/intel/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 36c6821..793335c 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4855,8 +4855,10 @@ static int intel_pmu_hw_config(struct perf_event *ev= ent) intel_pmu_set_acr_caused_constr(leader, idx++, cause_mask); =20 if (leader->nr_siblings) { - for_each_sibling_event(sibling, leader) - intel_pmu_set_acr_caused_constr(sibling, idx++, cause_mask); + for_each_sibling_event(sibling, leader) { + if (is_x86_event(sibling)) + intel_pmu_set_acr_caused_constr(sibling, idx++, cause_mask); + } } =20 if (leader !=3D event)