From nobody Thu Apr 2 07:43:57 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CA3F39FCC8; Mon, 30 Mar 2026 07:17:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774855022; cv=none; b=pgRh0VgEgPw0ZFCyv9DMwW+FIbeBfQbzTjPGKrYecfnLFEwa/e1F4FUD42D/pSKGm/RCgNZMsauuIhgFbDNVkjBPzh/rDg2o2vYNHj8xV/NmHVYI0ihRaG1vJWI/OWOusKKGOHye0AXZrGiwzrwGrT/h9THpnr/936XvTopvKz4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774855022; c=relaxed/simple; bh=JCWUtKlWT2dTpAspvogjpg1PdH3JewQf0YegHQO/MPs=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=rWkn5SNuW83HTD7aOXt04xBjlk2p8374wRIfLqBYC9GxNEMehjUfa18ujK05Z5EHl3usfC4yjmhuZuaIxHtR69GBszZpuqhqpxwmRgCN5DkaGapvngCY9SEoHatSU3K+Z2SCtESpt2wgpKfzJaS4EtjtpO2F5BoGonBj/sBc+DU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=jCE7eNI7; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=1V8uNBid; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="jCE7eNI7"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="1V8uNBid" Date: Mon, 30 Mar 2026 07:16:57 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1774855019; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9qttDDQ0K5dWTWUhyBqJrsyN0Nk/N7EFDrb811uQip4=; b=jCE7eNI7mAMahysthbYpDqiU0CRgdlDVRjk6Eml1htH56N6LExkjdwlHkVltUUDCVHgDab uOKTCnNDL6jF4kUEQJk6h11XoJwh42QHJb1j8+begneXvBxuH0XHSi+5RevqK1B0vAkAbg aDkby3f+lHcYZwTkmm92/523gqKi+Z8Y446+SXguXl5FTxBx1WtjEjpREEQadX38QDzqxM oVq2+b+KfDfXi0BBxyQvjtPHSTIFiiXEwMsRXVgFXQtwnCrJjVPpSZCoPpsFcIfCHwdNNd tdheaaZ53g7ZAdAZaiVAAqACMRP5CtbbodzplH9jYOrmGxpCroya5aRGCY5QEg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1774855019; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9qttDDQ0K5dWTWUhyBqJrsyN0Nk/N7EFDrb811uQip4=; b=1V8uNBid0FUacyl94yaS0jj+8xE0xlX5EUmIsJ9E+3O/APSBgI0pl9C9J9cQ9xc1xRVb6N Vza7bfac6HhMQ0DQ== From: "tip-bot2 for Uros Bizjak" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/asm] x86/asm/segment: Implement loadsegment()/savesegment() macros with static inline helpers Cc: "H. Peter Anvin" , Uros Bizjak , Ingo Molnar , Linus Torvalds , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260330055823.5793-4-ubizjak@gmail.com> References: <20260330055823.5793-4-ubizjak@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177485501774.1647592.16279190106511761600.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/asm branch of tip: Commit-ID: ec631bc3fb342ad7a2ec09433821e7201b7b15f9 Gitweb: https://git.kernel.org/tip/ec631bc3fb342ad7a2ec09433821e7201= b7b15f9 Author: Uros Bizjak AuthorDate: Mon, 30 Mar 2026 07:57:45 +02:00 Committer: Ingo Molnar CommitterDate: Mon, 30 Mar 2026 09:10:16 +02:00 x86/asm/segment: Implement loadsegment()/savesegment() macros with static i= nline helpers Convert the __loadsegment_simple() and savesegment() macro implementations into static inline helper functions generated via small helper macros. Historically loadsegment() and savesegment() relied on macros that embedded inline assembly. This approach obscures types, complicates debugging, and makes the call sites harder for the compiler and static analysis tools to reason about. This change is purely mechanical and does not alter the generated code, but improves readability, type safety, and compiler visibility of the helpers. Suggested-by: H. Peter Anvin Signed-off-by: Uros Bizjak Signed-off-by: Ingo Molnar Cc: Linus Torvalds Link: https://patch.msgid.link/20260330055823.5793-4-ubizjak@gmail.com --- arch/x86/include/asm/segment.h | 57 ++++++++++++++++++++------------- 1 file changed, 35 insertions(+), 22 deletions(-) diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h index 0f4283d..dbd90fe 100644 --- a/arch/x86/include/asm/segment.h +++ b/arch/x86/include/asm/segment.h @@ -302,19 +302,17 @@ extern const char xen_early_idt_handler_array[NUM_EXC= EPTION_VECTORS][XEN_EARLY_I * failure to fully clear the cached descriptor is only observable for * FS and GS. */ -#define __loadsegment_simple(seg, value) \ -do { \ - unsigned short __val =3D (value); \ - \ - asm volatile(" \n" \ - "1: movl %k0,%%" #seg " \n" \ +#define LOAD_SEGMENT(seg) \ +static inline void __loadsegment_##seg(u16 value) \ +{ \ + asm volatile("1: movl %k0,%%" #seg "\n" \ _ASM_EXTABLE_TYPE_REG(1b, 1b, EX_TYPE_ZERO_REG, %k0)\ - : "+r" (__val) : : "memory"); \ -} while (0) + : "+r" (value) : : "memory"); \ +} =20 -#define __loadsegment_ss(value) __loadsegment_simple(ss, (value)) -#define __loadsegment_ds(value) __loadsegment_simple(ds, (value)) -#define __loadsegment_es(value) __loadsegment_simple(es, (value)) +LOAD_SEGMENT(ss) +LOAD_SEGMENT(ds) +LOAD_SEGMENT(es) =20 #ifdef CONFIG_X86_32 =20 @@ -322,19 +320,16 @@ do { \ * On 32-bit systems, the hidden parts of FS and GS are unobservable if * the selector is NULL, so there's no funny business here. */ -#define __loadsegment_fs(value) __loadsegment_simple(fs, (value)) -#define __loadsegment_gs(value) __loadsegment_simple(gs, (value)) +LOAD_SEGMENT(fs) +LOAD_SEGMENT(gs) =20 #else =20 -static inline void __loadsegment_fs(unsigned short value) +static inline void __loadsegment_fs(u16 value) { - asm volatile(" \n" - "1: movw %0, %%fs \n" - "2: \n" - + asm volatile("1: movw %0, %%fs\n" + "2:\n" _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_CLEAR_FS) - : : ASM_INPUT_RM (value) : "memory"); } =20 @@ -342,13 +337,31 @@ static inline void __loadsegment_fs(unsigned short va= lue) =20 #endif =20 -#define loadsegment(seg, value) __loadsegment_ ## seg (value) +#undef LOAD_SEGMENT + +#define loadsegment(seg, val) __loadsegment_##seg(val) =20 /* * Save a segment register away: */ -#define savesegment(seg, value) \ - asm volatile("movl %%" #seg ",%k0" : "=3Dr" (value)) +#define SAVE_SEGMENT(seg) \ +static inline unsigned long __savesegment_##seg(void) \ +{ \ + unsigned long v; \ + asm volatile("movl %%" #seg ",%k0" : "=3Dr" (v)); \ + return v; \ +} + +SAVE_SEGMENT(cs) +SAVE_SEGMENT(ss) +SAVE_SEGMENT(ds) +SAVE_SEGMENT(es) +SAVE_SEGMENT(fs) +SAVE_SEGMENT(gs) + +#undef SAVE_SEGMENT + +#define savesegment(seg, var) ((var) =3D __savesegment_##seg()) =20 #endif /* !__ASSEMBLER__ */ #endif /* __KERNEL__ */