From nobody Thu Apr 2 20:22:00 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81CB3405AB7; Thu, 26 Mar 2026 16:00:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774540841; cv=none; b=GeOHeLOOrsHO5gR8sYfTU6cszaa3pIgzSOFOfl3SVuxS55YpJnOGte2vROav5+aJY4patIA6a2kiPRo+BHH+Gubyc1yKBU8cD31/b5bWQ0+QMya3GkUST3qK1n1ySvvZZ2o9rS5ghHgL5dbx0VBBgDPiBpaOAKWtkmc9qBas5JY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774540841; c=relaxed/simple; bh=dUhlxBRL+UhucIioqIBrEFzeK7a/igJFwFadMbYfHfQ=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=JkOGSD3qdWSqrgnyb3PXeyvb4HdUj6Qza0IuXRa0W6x+7WMHITQyDAxSqbe2gAY/Q9lCwYVGemKqkZ9bjjbwZFiiwmLg+LbIlMBlCWSWU+FKA1EwQqJiyhJz17oIWvZA7FdmrRHxnc3p4TTtmAmYRk3mFAoHyqjx8JFs4ryNO6o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=DBH/qOQA; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=9TTO9Pyx; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="DBH/qOQA"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="9TTO9Pyx" Date: Thu, 26 Mar 2026 16:00:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1774540838; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RHuwoCqQQ7ta/xt3c5na5mfI/yHp+MCmvoJH6/7Exw4=; b=DBH/qOQADWWP65i3Ko45I2tZEiJ+589yyswFyxYO+ZntII3N0X5EK+WKOoVChEnlmcxRBD s1Mhh18aWMryD80IZJGRfWWUtAadVSumgkEAE/G9zIKEMsCoCOQEldZf6nmoZghtfaEp4L 8pd5UFrFBWVX4cmUcNAb9DyHM5I9mWDRrSt7wndO/nARwLB4xU3YRESDtK/VPQWoWSbhCM DXp6eW2P2w7d8cyp1OQX4JYUdeMxs4OFmhNiRGKauP2JB6zGFe0LsUoWab8kQcu4+ql3J8 X3YMWCsXyaixET+LRt9+V06vPN55U/9vrjTSlETuKqLs5gnJ0yiGgJTX+m/G8A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1774540838; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RHuwoCqQQ7ta/xt3c5na5mfI/yHp+MCmvoJH6/7Exw4=; b=9TTO9PyxO9Sw7BQiW5q/9smJ2JZ21+rORVknlq6U7tHuW6QP1is5+sXLrT5DIvvVqF3cAR MXgk5Urd7JbWFMDQ== From: "tip-bot2 for Biju Das" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/renesas-rzg2l: Split set_type handler into separate IRQ and TINT functions Cc: Biju Das , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260325192451.172562-8-biju.das.jz@bp.renesas.com> References: <20260325192451.172562-8-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177454083666.1647592.18342076994163833304.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: d196aeb35efa2f2339b31f107c0ce35387946009 Gitweb: https://git.kernel.org/tip/d196aeb35efa2f2339b31f107c0ce3538= 7946009 Author: Biju Das AuthorDate: Wed, 25 Mar 2026 19:24:22=20 Committer: Thomas Gleixner CommitterDate: Thu, 26 Mar 2026 16:56:21 +01:00 irqchip/renesas-rzg2l: Split set_type handler into separate IRQ and TINT fu= nctions The common rzg2l_irqc_set_type() handler uses hw_irq range checks to dispatch to either rzg2l_irq_set_type() or rzg2l_tint_set_edge(). Split this into two dedicated handlers, rzg2l_irqc_irq_set_type() and rzg2l_irqc_tint_set_type(), each calling only their respective type configuration function without runtime conditionals. Signed-off-by: Biju Das Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260325192451.172562-8-biju.das.jz@bp.renes= as.com --- drivers/irqchip/irq-renesas-rzg2l.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-rene= sas-rzg2l.c index 664599a..3d48491 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -393,15 +393,20 @@ static int rzg2l_tint_set_edge(struct irq_data *d, un= signed int type) return 0; } =20 -static int rzg2l_irqc_set_type(struct irq_data *d, unsigned int type) +static int rzg2l_irqc_irq_set_type(struct irq_data *d, unsigned int type) { - unsigned int hw_irq =3D irqd_to_hwirq(d); - int ret =3D -EINVAL; + int ret =3D rzg2l_irq_set_type(d, type); + + if (ret) + return ret; + + return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); +} + +static int rzg2l_irqc_tint_set_type(struct irq_data *d, unsigned int type) +{ + int ret =3D rzg2l_tint_set_edge(d, type); =20 - if (hw_irq >=3D IRQC_IRQ_START && hw_irq <=3D IRQC_IRQ_COUNT) - ret =3D rzg2l_irq_set_type(d, type); - else if (hw_irq >=3D IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ) - ret =3D rzg2l_tint_set_edge(d, type); if (ret) return ret; =20 @@ -454,7 +459,7 @@ static const struct irq_chip rzg2l_irqc_irq_chip =3D { .irq_get_irqchip_state =3D irq_chip_get_parent_state, .irq_set_irqchip_state =3D irq_chip_set_parent_state, .irq_retrigger =3D irq_chip_retrigger_hierarchy, - .irq_set_type =3D rzg2l_irqc_set_type, + .irq_set_type =3D rzg2l_irqc_irq_set_type, .irq_set_affinity =3D irq_chip_set_affinity_parent, .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -471,7 +476,7 @@ static const struct irq_chip rzg2l_irqc_tint_chip =3D { .irq_get_irqchip_state =3D irq_chip_get_parent_state, .irq_set_irqchip_state =3D irq_chip_set_parent_state, .irq_retrigger =3D irq_chip_retrigger_hierarchy, - .irq_set_type =3D rzg2l_irqc_set_type, + .irq_set_type =3D rzg2l_irqc_tint_set_type, .irq_set_affinity =3D irq_chip_set_affinity_parent, .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -488,7 +493,7 @@ static const struct irq_chip rzfive_irqc_irq_chip =3D { .irq_get_irqchip_state =3D irq_chip_get_parent_state, .irq_set_irqchip_state =3D irq_chip_set_parent_state, .irq_retrigger =3D irq_chip_retrigger_hierarchy, - .irq_set_type =3D rzg2l_irqc_set_type, + .irq_set_type =3D rzg2l_irqc_irq_set_type, .irq_set_affinity =3D irq_chip_set_affinity_parent, .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -505,7 +510,7 @@ static const struct irq_chip rzfive_irqc_tint_chip =3D { .irq_get_irqchip_state =3D irq_chip_get_parent_state, .irq_set_irqchip_state =3D irq_chip_set_parent_state, .irq_retrigger =3D irq_chip_retrigger_hierarchy, - .irq_set_type =3D rzg2l_irqc_set_type, + .irq_set_type =3D rzg2l_irqc_tint_set_type, .irq_set_affinity =3D irq_chip_set_affinity_parent, .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED |