From nobody Thu Apr 2 20:22:01 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 766E3402BAB; Thu, 26 Mar 2026 15:22:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774538524; cv=none; b=l2Z1md/t7WtkAcjbDNR3Y0Lxj0XWNL6RzHy/Mj0FcOZuP/nteSvctskkB0RWyep0rFa7LqAsTHdD4YOrbiZZoGKZ2tH+8IQa1M8tdrYH5XI5BNPCGYs74PTMZERMdJwgO1O5zb5eMHjGujnZbRkx5gSeqQ9PXONlIQDNKUyKI1w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774538524; c=relaxed/simple; bh=h1UmGTIc0jpkzGDaPL3CxNd+dw9+qKZuRQf5MGaWhl4=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=PGYGkdpLiBIM5NiK+fJssjWJgPcwUuhB8rOVqKdmYTnKClbU+6jdw9aDRqFgFtC3lEuQefZcaeW5RtL94Bqc+L9zJnpGLSPb/7Ovc8FpkDyG0xw6kdc1QNb8pp+18rLAEaf0wzD4YqCTHgAZLH9gOH1dgqQ8C75nCEbKS+11wRE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=ZiYchlAA; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=nq4iepUc; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="ZiYchlAA"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="nq4iepUc" Date: Thu, 26 Mar 2026 15:22:00 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1774538521; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=f6FOIuWCx7pxsSP1hcRwmseEgOyLpdPDum+vx9KUhbg=; b=ZiYchlAAvkkUnQRU0JnLNKaZe80HDC0/OWhy9gJKZrcJYWb0kc98DzVJyRWhT8KVLppENU YTHLeb+aaCkSKDmaU+K/jbFzLrCZPxlf8zO0EvVrzEpC6YxjUw/o6irRKT8h5bTSXWQPlt rJw2D1ROeJbXhRr2QdLwdF5blDH2QOc3e/ES9oZxhFg6FTTzbEiuT9rjPK4sKSzOzQ429Q svKeSNRR4+cEPuk2SKJg5/KMG5As6UHpC4MvuUI8YT4u0RALv/z40WPNfEOW0VQiOTGZ17 7om7lyisw5MuQvQHsabiMAa5oKDk8RMEAkm1CdDSbin6ih5JQwTCkyaWZV7+xw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1774538521; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=f6FOIuWCx7pxsSP1hcRwmseEgOyLpdPDum+vx9KUhbg=; b=nq4iepUciawjuPjiY6LYq8/XOAHXJxWaaMNfumWyrAOP2/0vUTCezIQ6TgxqCcp/nl129b vaKyKtWkwxP1vxCg== From: "tip-bot2 for Icenowy Zheng" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs Cc: Icenowy Zheng , Thomas Gleixner , Huacai Chen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260321092032.3502701-2-zhengxingda@iscas.ac.cn> References: <20260321092032.3502701-2-zhengxingda@iscas.ac.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177453852024.1647592.16054697624437632741.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 57c9c7bf52c8473a6b9b7fa3547b468c0a91bc60 Gitweb: https://git.kernel.org/tip/57c9c7bf52c8473a6b9b7fa3547b468c0= a91bc60 Author: Icenowy Zheng AuthorDate: Sat, 21 Mar 2026 17:20:27 +08:00 Committer: Thomas Gleixner CommitterDate: Thu, 26 Mar 2026 16:15:02 +01:00 MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs On some Loongson 3A devices, a LPC bus is present and some legacy devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However currently the expected low range interrupt numbers are not exempted from the dynamic allocation, which leads to conflicts when registering LPC interrupts in the fixed range. Override arch_dynirq_lower_bound() to reserve these low range interrupt numbers and prevent them from being dynamically allocated. Signed-off-by: Icenowy Zheng Signed-off-by: Thomas Gleixner Reviewed-by: Huacai Chen Link: https://patch.msgid.link/20260321092032.3502701-2-zhengxingda@iscas.a= c.cn --- arch/mips/loongson64/init.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c index 5f73f86..c7cc5a3 100644 --- a/arch/mips/loongson64/init.c +++ b/arch/mips/loongson64/init.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -227,3 +228,8 @@ void __init arch_init_irq(void) reserve_pio_range(); irqchip_init(); } + +unsigned int arch_dynirq_lower_bound(unsigned int from) +{ + return MAX(from, NR_IRQS_LEGACY); +}