From nobody Fri Apr 3 03:00:11 2026 Received: from mail-m49211.qiye.163.com (mail-m49211.qiye.163.com [45.254.49.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 491DE374735 for ; Wed, 25 Mar 2026 07:38:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.211 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774424323; cv=none; b=Gw+1/vXw3Um46NiO7i6eKoDhTCo2akC8dfLK9iQd2TKC+1xeVi/mQYm0RaGDfK6WM/0lijhq0gW7oKwGKoC4XImsok3OXtSKZiP5B51mCSj1LWeUnEtYW9dBz0Ib9EXQNUjTsWvqa7rKBUWmsZK9bfNrAevetkRqAiv0UY3UpXs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774424323; c=relaxed/simple; bh=2/Pp+y5ZDwvyzxrKckRziu4AkM8+NhC1OuzRmmOZIRw=; h=From:To:Cc:Subject:Date:Message-Id; b=dilVS3HOEAjX9wQ61eWEHsu30BvHZOOUJrrLQNzQCdCU51KSavNNFZ+UvAsUc5TU4uDRh822eF8wbsVkDHCaGkOhHIVzABoP7csIw8MIgWixCK3BiSDB4q5b7JojrbLKS5kXPlN28a1ivAh4ZFnqtebYjBSgU8reQhBoJQK3A9Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=KFk7n0mG; arc=none smtp.client-ip=45.254.49.211 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="KFk7n0mG" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 3839e259b; Wed, 25 Mar 2026 15:23:12 +0800 (GMT+08:00) From: Shawn Lin To: Vinod Koul Cc: linux-rockchip@lists.infradead.org, linux-phy@lists.infradead.org, Heiko Stuebner , Neil Armstrong , linux-kernel@vger.kernel.org, Shawn Lin Subject: [PATCH] phy: rockchip: naneng-combphy: Fix TX detect RX termination errata Date: Wed, 25 Mar 2026 15:23:03 +0800 Message-Id: <1774423383-36599-1-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 X-HM-Tid: 0a9d23e0409309cckunmc407d4e1aadef8 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGUlDT1ZOS01OSUgaSU1JGB9WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=KFk7n0mGkODzoEAZFEsaZF8hbqLkb7qvrNLszhp5Whvez9C8qfqDyu8ZzvJhyBOZyROiafsQH6fJ7f9STlna5FoHfzmoSfuBdzc1iXbqh/Pn8Kcpf1dEiHxWOj3vjk+5yJ2RlSNRNZNE2Tw5mgdFH0npA3zMF606iagwPLM7Fw4=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=srSIYmLdFnX0p7+ayVgQBmHUMD03vlZS2quJ2yF9fps=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some PHY revisions may fail to detect the peer RX's termination resistor (RTERM) under certain critical temperature conditions. This causes TX detection failures on PCIe links. Add a workaround to force the RTERM detection ready signal for affected PHY revisions. This ensures reliable TX-to-RX termination detection across all operating temperature ranges. The fix applies to RK3562, RK3568, RK3576 and RK3588 SoCs which share the same PHY IP with this hardware errata. Signed-off-by: Shawn Lin --- drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/p= hy/rockchip/phy-rockchip-naneng-combphy.c index b60d6bf..76d4994 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -106,6 +106,9 @@ #define RK3568_PHYREG18 0x44 #define RK3568_PHYREG18_PLL_LOOP 0x32 =20 +#define RK3568_PHYREG26 0x64 +#define RK3568_PHYREG26_FORCE_RTERM_DET_RDY BIT(5) + #define RK3568_PHYREG30 0x74 #define RK3568_PHYREG30_GATE_TX_PCK_SEL BIT(7) #define RK3568_PHYREG30_GATE_TX_PCK_DLY_PLL_OFF BIT(7) @@ -193,6 +196,7 @@ struct rockchip_combphy_cfg { unsigned int num_phys; unsigned int phy_ids[3]; const struct rockchip_combphy_grfcfg *grfcfg; + bool force_rxterm_det_rdy; int (*combphy_cfg)(struct rockchip_combphy_priv *priv); }; =20 @@ -264,6 +268,17 @@ static int rockchip_combphy_init(struct phy *phy) =20 switch (priv->type) { case PHY_TYPE_PCIE: + /* + * Hardware Errata: TX fails to detect peer RX termination. + * Some PHY revisions may fail to detect remote RX's RTERM + * (receiver termination resistor) under certain critical + * temperature conditions. Set force rterm detect ready to + * fix it. + */ + if (priv->cfg->force_rxterm_det_rdy) + rockchip_combphy_updatel(priv, RK3568_PHYREG26_FORCE_RTERM_DET_RDY, + RK3568_PHYREG26_FORCE_RTERM_DET_RDY, RK3568_PHYREG26); + fallthrough; case PHY_TYPE_USB3: case PHY_TYPE_SATA: case PHY_TYPE_SGMII: @@ -745,6 +760,7 @@ static const struct rockchip_combphy_cfg rk3562_combphy= _cfgs =3D { }, .grfcfg =3D &rk3562_combphy_grfcfgs, .combphy_cfg =3D rk3562_combphy_cfg, + .force_rxterm_det_rdy =3D true, }; =20 static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) @@ -962,6 +978,7 @@ static const struct rockchip_combphy_cfg rk3568_combphy= _cfgs =3D { }, .grfcfg =3D &rk3568_combphy_grfcfgs, .combphy_cfg =3D rk3568_combphy_cfg, + .force_rxterm_det_rdy =3D true, }; =20 static int rk3576_combphy_cfg(struct rockchip_combphy_priv *priv) @@ -1231,6 +1248,7 @@ static const struct rockchip_combphy_cfg rk3576_combp= hy_cfgs =3D { }, .grfcfg =3D &rk3576_combphy_grfcfgs, .combphy_cfg =3D rk3576_combphy_cfg, + .force_rxterm_det_rdy =3D true, }; =20 static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) @@ -1418,6 +1436,7 @@ static const struct rockchip_combphy_cfg rk3588_combp= hy_cfgs =3D { }, .grfcfg =3D &rk3588_combphy_grfcfgs, .combphy_cfg =3D rk3588_combphy_cfg, + .force_rxterm_det_rdy =3D true, }; =20 static const struct of_device_id rockchip_combphy_of_match[] =3D { --=20 2.7.4