From nobody Mon Apr 6 09:13:44 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C2A336EAB0; Thu, 19 Mar 2026 22:59:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773961172; cv=none; b=RoQ4v7ZPNfQ8Vm9oYvzhY0ZgpGpnjyIpnZUCVXzfm5idYX4zuk8VK9af6FewNKw2kUeWdT/br2GCQrWYX/2BIvrSqRdKOhas42+vW6Mc+LUuttWf63jOdxsSm15D5+M4azAxgUOplAQe6ud5vbQohswZ8malD/76o5Cl3m+2oBM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773961172; c=relaxed/simple; bh=/HI/G/biNr9wOX391+d4bF5pqS+cUSsHjamAzJiOKhM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=VEqtDsl8UubyYbeVthAxYVE06EM0GOzTAx97962XgZf5/JWkl5BRYYM1Gsi7q7P5WvaRfyQDhPPK89lmzUMg6JyR5fhMOpQZRX8225VYojXVUUkDCV7uRxv+jiiNLIm7joclvhhvvMooUz1MVJuI23MBpSacPpTbahFChBc1qgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=In2tQLVW; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=KddnVPj9; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="In2tQLVW"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="KddnVPj9" Date: Thu, 19 Mar 2026 22:59:28 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773961169; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MOObVHN8Qyu/I7zPfPFnkhgS5LyZ6iCITZChVmjrKj4=; b=In2tQLVWu3SostWuFFTOqNjw4Rn7b5Qu9IHCFwXMPIxoGmvM7FHihGZUwO0pla3SbzQBNe VHjweVzWtR/6RxQAxmW1iLJhxYzEozUC78IZQKcfdCiy9W2QQQNMziEib59MitiSlFqkW1 /rf1amaxmwMZcD+6XW/YUBwHYPEAV9XApJ0qDWPqDYSkBi6Dx9Pmo1HSbYY1y3m5snFaVI Tw5xUM6DVSb7vmCLMZaeyW3dcRK3TTfiOg/xCGI7lUQ6hB8+SMyNwOdBQ+1AleFR+QvV9Z qyfOHXYz0vIlbTHTRSGwADlblE9oUnzWWfpjXgNDCBZXnGJK1ksrZgL7dqyLUg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773961169; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MOObVHN8Qyu/I7zPfPFnkhgS5LyZ6iCITZChVmjrKj4=; b=KddnVPj9iQ3Y9M/WrfhyjvludVIxM0wQfrZUTwh62M8VVqWdUJBugSwca7y853EXbPJWaf OCz1z8Fg0rWRfGBQ== From: "tip-bot2 for Sohil Mehta" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/vsyscall: Reorganize the page fault emulation code Cc: Sohil Mehta , Dave Hansen , "H. Peter Anvin (Intel)" , "Maciej Wieczor-Retman" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260309181029.398498-2-sohil.mehta@intel.com> References: <20260309181029.398498-2-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177396116850.1647592.15188247396885333845.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 3ddd2e12c704f22c28efb714817c88ee4e25688a Gitweb: https://git.kernel.org/tip/3ddd2e12c704f22c28efb714817c88ee4= e25688a Author: Sohil Mehta AuthorDate: Mon, 09 Mar 2026 11:10:25 -07:00 Committer: Dave Hansen CommitterDate: Thu, 19 Mar 2026 15:11:12 -07:00 x86/vsyscall: Reorganize the page fault emulation code With LASS, vsyscall page accesses will cause a #GP instead of a #PF. Separate out the core vsyscall emulation code from the #PF specific handling in preparation for the upcoming #GP emulation. No functional change intended. Signed-off-by: Sohil Mehta Signed-off-by: Dave Hansen Reviewed-by: H. Peter Anvin (Intel) Acked-by: Dave Hansen Tested-by: Maciej Wieczor-Retman Link: https://patch.msgid.link/20260309181029.398498-2-sohil.mehta@intel.com --- arch/x86/entry/vsyscall/vsyscall_64.c | 66 +++++++++++++------------- arch/x86/include/asm/vsyscall.h | 7 +-- arch/x86/mm/fault.c | 2 +- 3 files changed, 39 insertions(+), 36 deletions(-) diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscal= l/vsyscall_64.c index 4bd1e27..398b1ed 100644 --- a/arch/x86/entry/vsyscall/vsyscall_64.c +++ b/arch/x86/entry/vsyscall/vsyscall_64.c @@ -111,43 +111,13 @@ static bool write_ok_or_segv(unsigned long ptr, size_= t size) } } =20 -bool emulate_vsyscall(unsigned long error_code, - struct pt_regs *regs, unsigned long address) +static bool __emulate_vsyscall(struct pt_regs *regs, unsigned long address) { unsigned long caller; int vsyscall_nr, syscall_nr, tmp; long ret; unsigned long orig_dx; =20 - /* Write faults or kernel-privilege faults never get fixed up. */ - if ((error_code & (X86_PF_WRITE | X86_PF_USER)) !=3D X86_PF_USER) - return false; - - /* - * Assume that faults at regs->ip are because of an - * instruction fetch. Return early and avoid - * emulation for faults during data accesses: - */ - if (address !=3D regs->ip) { - /* Failed vsyscall read */ - if (vsyscall_mode =3D=3D EMULATE) - return false; - - /* - * User code tried and failed to read the vsyscall page. - */ - warn_bad_vsyscall(KERN_INFO, regs, "vsyscall read attempt denied -- look= up the vsyscall kernel parameter if you need a workaround"); - return false; - } - - /* - * X86_PF_INSTR is only set when NX is supported. When - * available, use it to double-check that the emulation code - * is only being used for instruction fetches: - */ - if (cpu_feature_enabled(X86_FEATURE_NX)) - WARN_ON_ONCE(!(error_code & X86_PF_INSTR)); - /* * No point in checking CS -- the only way to get here is a user mode * trap to a high address, which means that we're in 64-bit user code. @@ -280,6 +250,40 @@ sigsegv: return true; } =20 +bool emulate_vsyscall_pf(unsigned long error_code, struct pt_regs *regs, + unsigned long address) +{ + /* Write faults or kernel-privilege faults never get fixed up. */ + if ((error_code & (X86_PF_WRITE | X86_PF_USER)) !=3D X86_PF_USER) + return false; + + /* + * Assume that faults at regs->ip are because of an instruction + * fetch. Return early and avoid emulation for faults during + * data accesses: + */ + if (address !=3D regs->ip) { + /* Failed vsyscall read */ + if (vsyscall_mode =3D=3D EMULATE) + return false; + + /* User code tried and failed to read the vsyscall page. */ + warn_bad_vsyscall(KERN_INFO, regs, + "vsyscall read attempt denied -- look up the vsyscall kernel paramet= er if you need a workaround"); + return false; + } + + /* + * X86_PF_INSTR is only set when NX is supported. When + * available, use it to double-check that the emulation code + * is only being used for instruction fetches: + */ + if (cpu_feature_enabled(X86_FEATURE_NX)) + WARN_ON_ONCE(!(error_code & X86_PF_INSTR)); + + return __emulate_vsyscall(regs, address); +} + /* * A pseudo VMA to allow ptrace access for the vsyscall page. This only * covers the 64bit vsyscall page now. 32bit has a real VMA now and does diff --git a/arch/x86/include/asm/vsyscall.h b/arch/x86/include/asm/vsyscal= l.h index 472f026..f349023 100644 --- a/arch/x86/include/asm/vsyscall.h +++ b/arch/x86/include/asm/vsyscall.h @@ -14,12 +14,11 @@ extern void set_vsyscall_pgtable_user_bits(pgd_t *root); * Called on instruction fetch fault in vsyscall page. * Returns true if handled. */ -extern bool emulate_vsyscall(unsigned long error_code, - struct pt_regs *regs, unsigned long address); +bool emulate_vsyscall_pf(unsigned long error_code, struct pt_regs *regs, u= nsigned long address); #else static inline void map_vsyscall(void) {} -static inline bool emulate_vsyscall(unsigned long error_code, - struct pt_regs *regs, unsigned long address) +static inline bool emulate_vsyscall_pf(unsigned long error_code, + struct pt_regs *regs, unsigned long address) { return false; } diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index b83a067..f0e77e0 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -1314,7 +1314,7 @@ void do_user_addr_fault(struct pt_regs *regs, * to consider the PF_PK bit. */ if (is_vsyscall_vaddr(address)) { - if (emulate_vsyscall(error_code, regs, address)) + if (emulate_vsyscall_pf(error_code, regs, address)) return; } #endif