From nobody Mon Apr 6 19:59:14 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5573137AA68; Wed, 18 Mar 2026 08:03:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773820982; cv=none; b=O234P6NU9d9NWhFAw2JuJocKlEUmExm7U+aYSCgZw63JRSVt6dOvnaCmqzfgi8MuGf03uDDShqO5AFg3DsXBq34T1C5b6ZfyhtwHWwxvhHfDvEkGPylNqcrw6K4aRiBPv3jFOfTadpjsXfJbOENE809/jmF8WwhJT3tR9OdU/g0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773820982; c=relaxed/simple; bh=KP4/O3e4JQuBPpm7az1R47OL7zJio1voDN9jddB8uHg=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=iVnwP/hWsREuHAl/13JNEuNnq8DTmoAlObzmRenHVAyytkRr2ly9aAoVCQktDZC19Eu/RHkHu0G6hUkw1aCt0p76Y8CsL1AtgjFS64sRSuEmjD0/ht4/U4MvN6FCT2I6Eo3eGrvLv6yzpb1u41FMDzzJagRK/pQObTXf1UKus1g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=FFoDstLC; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=95hmT3B6; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="FFoDstLC"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="95hmT3B6" Date: Wed, 18 Mar 2026 08:02:57 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773820979; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bZi1Y8F9p3N6GV0b2f7kW8Afjwz9Tic9q5NJrY5bLbk=; b=FFoDstLCjLikKeMDcf4vdZhvZqxc7naIa24EJiRKbsRvDzJx12AyawMjuXLmSYOSoMMBLZ JD3jfgpnHqUGEaDimHy7TKRP2ChroowIK3k5O409T3EhG+uHxdomZEO99SCNYnvqG1pl/I fIrw66bC6mIu2J2WKfEtw4Ii9pAC14UMf8lKvrHj/EIXdCBHoaP5WgkGzCaf6jc4VHL89D atJAH5INBHcCChrVfqMYMM1eZBgcd4c8ONKiKq/NB+NNCCCfJdfksIIDD282oLb5XnCwCq +TX9hh0lOc5JFK3I2XjStGmMwlYcKxzCpE23NgnHIFmTPRr/t9cgXvcuK7/BAQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773820979; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=bZi1Y8F9p3N6GV0b2f7kW8Afjwz9Tic9q5NJrY5bLbk=; b=95hmT3B6kTTTd/qZaufYXs/0fCs/BM4nC+XJzGy6d32FeKfF4Z8kvAWRc06ghP8UlHJDXI rPMTpolWIquZFrAw== From: "tip-bot2 for Marco Elver" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: locking/core] arm64: Optimize __READ_ONCE() with CONFIG_LTO=y Cc: Marco Elver , Will Deacon , x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177382097776.1647592.13758991207892775370.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the locking/core branch of tip: Commit-ID: abf1be684dc270b94b7c8782f562959b33766fc0 Gitweb: https://git.kernel.org/tip/abf1be684dc270b94b7c8782f562959b3= 3766fc0 Author: Marco Elver AuthorDate: Mon, 16 Feb 2026 15:16:22 +01:00 Committer: Will Deacon CommitterDate: Thu, 26 Feb 2026 18:03:07=20 arm64: Optimize __READ_ONCE() with CONFIG_LTO=3Dy Rework arm64 LTO __READ_ONCE() to improve code generation as follows: 1. Replace _Generic-based __unqual_scalar_typeof() with more complete __rwonce_typeof_unqual(). This strips qualifiers from all types, not just integer types, which is required to be able to assign (must be non-const) to __u.__val in the non-atomic case (required for #2). One subtle point here is that non-integer types of __val could be const or volatile within the union with the old __unqual_scalar_typeof(), if the passed variable is const or volatile. This would then result in a forced load from the stack if __u.__val is volatile; in the case of const, it does look odd if the underlying storage changes, but the compiler is told said member is "const" -- it smells like UB. 2. Eliminate the atomic flag and ternary conditional expression. Move the fallback volatile load into the default case of the switch, ensuring __u is unconditionally initialized across all paths. The statement expression now unconditionally returns __u.__val. This refactoring appears to help the compiler improve (or fix) code generation. With a defconfig + LTO + debug options builds, we observe different codegen for the following functions: btrfs_reclaim_sweep (708 -> 1032 bytes) btrfs_sinfo_bg_reclaim_threshold_store (200 -> 204 bytes) check_mem_access (3652 -> 3692 bytes) [inlined bpf_map_is_rdonly] console_flush_all (1268 -> 1264 bytes) console_lock_spinning_disable_and_check (180 -> 176 bytes) igb_add_filter (640 -> 636 bytes) igb_config_tx_modes (2404 -> 2400 bytes) kvm_vcpu_on_spin (480 -> 476 bytes) map_freeze (376 -> 380 bytes) netlink_bind (1664 -> 1656 bytes) nmi_cpu_backtrace (404 -> 400 bytes) set_rps_cpu (516 -> 520 bytes) swap_cluster_readahead (944 -> 932 bytes) tcp_accecn_third_ack (328 -> 336 bytes) tcp_create_openreq_child (1764 -> 1772 bytes) tcp_data_queue (5784 -> 5892 bytes) tcp_ecn_rcv_synack (620 -> 628 bytes) xen_manage_runstate_time (944 -> 896 bytes) xen_steal_clock (340 -> 296 bytes) Increase of some functions are due to more aggressive inlining due to better codegen (in this build, e.g. bpf_map_is_rdonly is no longer present due to being inlined completely). NOTE: The return-value-of-function-drops-qualifiers hack was first suggested by Al Viro in [1], which notes some of its limitations which make it unsuitable for a general __unqual_scalar_typeof() replacement. Notably, array types are not supported, and GCC 8.1-8.3 still fail. Why should we use it here? READ_ONCE() does not support reading whole arrays, and the GCC version problem only affects 3 minor releases of a very ancient still-supported GCC version; not only that, this arm64 READ_ONCE() version is currently only activated by LTO builds, which to-date are *only supported by Clang*! Link: https://lore.kernel.org/all/20260111182010.GH3634291@ZenIV/ [1] Signed-off-by: Marco Elver Signed-off-by: Will Deacon --- arch/arm64/include/asm/rwonce.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/rwonce.h b/arch/arm64/include/asm/rwonc= e.h index fc0fb42..9fd24ce 100644 --- a/arch/arm64/include/asm/rwonce.h +++ b/arch/arm64/include/asm/rwonce.h @@ -20,6 +20,17 @@ ARM64_HAS_LDAPR) =20 /* + * Replace this with typeof_unqual() when minimum compiler versions are + * increased to GCC 14 and Clang 19. For the time being, we need this + * workaround, which relies on function return values dropping qualifiers. + */ +#define __rwonce_typeof_unqual(x) typeof(({ \ + __diag_push() \ + __diag_ignore_all("-Wignored-qualifiers", "") \ + ((typeof(x)(*)(void))0)(); \ + __diag_pop() })) + +/* * When building with LTO, there is an increased risk of the compiler * converting an address dependency headed by a READ_ONCE() invocation * into a control dependency and consequently allowing for harmful @@ -32,8 +43,7 @@ #define __READ_ONCE(x) \ ({ \ typeof(&(x)) __x =3D &(x); \ - int atomic =3D 1; \ - union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \ + union { __rwonce_typeof_unqual(*__x) __val; char __c[1]; } __u; \ switch (sizeof(x)) { \ case 1: \ asm volatile(__LOAD_RCPC(b, %w0, %1) \ @@ -56,9 +66,9 @@ : "Q" (*__x) : "memory"); \ break; \ default: \ - atomic =3D 0; \ + __u.__val =3D *(volatile typeof(*__x) *)__x; \ } \ - atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(*__x) *)__x);\ + __u.__val; \ }) =20 #endif /* !BUILD_VDSO */