From nobody Mon Apr 6 20:03:05 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5569B378825; Wed, 18 Mar 2026 08:03:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773820982; cv=none; b=lVwdbDdZ7CK2eyPpzTPN4UOc7Jvawuu/JTsd8fkeFugC+OT/o+gVbjPaulbzTKCj6406J9RNmwLHof00BuDu3m9l8MCul+e8itV7/Ld1l/mGucVkKZNrvbFaPMXfHDpJyaCoNh2uRERrywEPftOYXvSD5C/F1owKgKdcEbV/T6s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773820982; c=relaxed/simple; bh=h6fLuT913n7K3VaVEMoLZRADYZO9O43eVhf0LXaQm8k=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=VCjZ8PDBm+euoGlUpbN4CUBxbrM+MgP9I2ZREMj/Q2KsFBnTALsKFBi/h4bWSf/GZz446qvJ+rYk6xNNQmpSIIKnZTI+CdTWKJ+0eqaFNJEr/BB9mzZZ97nyPBTMF89gjsOw0rnnzsISiSGH4rxR1RPX/kuF/zix0xCGnhpxS+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=RMcjv77m; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=ub3Sacdy; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="RMcjv77m"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="ub3Sacdy" Date: Wed, 18 Mar 2026 08:02:56 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773820977; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=uvMo1rcuZ1ElfSE/SEyfh3Wg9dn9dTkzIKYw/0l0wZw=; b=RMcjv77mslVZF7GfnuB5zl6bgZq3iPCdw6YvOhTOfrL7Elk93gnwfrvpDllflvsy+6RsiE D3Q4BdkvQdMun4/zHzBCfpodIHCKBzL8olcidO5B1iqXqIGFQyB4ZamdTo8KxXtiBXgkDF C59zvuVJb9tyJ8y9IFChYL7q6Vae9uWB0BTxwHetioPO0LLezZdNg0etSXt3KSnv+8Rk3+ ZTe9jyP+5wFawWH4BX8FUuiFCZ4kj7faT+XOx4dcnvX1eXYa1poAfQB/I0KerE8kYgDU4Q KDjZlvjkfOraip8ORkUnK1RG6EsI0Ti3dcEFE6LmAwvgWo5gZ8feQJYBcDQ/VQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773820977; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=uvMo1rcuZ1ElfSE/SEyfh3Wg9dn9dTkzIKYw/0l0wZw=; b=ub3Sacdy4IW/qITh7q79Bnw0ytjBA2IhyRpHYbo3Up6mN+klpMf8Tteh43X+94k5QlbFtT UgXTpzJETuRxYYBA== From: "tip-bot2 for Marco Elver" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: locking/core] arm64, compiler-context-analysis: Permit alias analysis through __READ_ONCE() with CONFIG_LTO=y Cc: kernel test robot , Peter Zijlstra , Boqun Feng , David Laight , Marco Elver , Will Deacon , x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177382097668.1647592.1187179089606306573.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the locking/core branch of tip: Commit-ID: 773b24bcedc16a4a29e8579d66ec67ca7aa0014f Gitweb: https://git.kernel.org/tip/773b24bcedc16a4a29e8579d66ec67ca7= aa0014f Author: Marco Elver AuthorDate: Mon, 16 Feb 2026 15:16:23 +01:00 Committer: Will Deacon CommitterDate: Thu, 26 Feb 2026 18:03:07=20 arm64, compiler-context-analysis: Permit alias analysis through __READ_ONCE= () with CONFIG_LTO=3Dy When enabling Clang's Context Analysis (aka. Thread Safety Analysis) on kernel/futex/core.o (see Peter's changes at [1]), in arm64 LTO builds we could see: | kernel/futex/core.c:982:1: warning: spinlock 'atomic ? __u.__val : q->loc= k_ptr' is still held at the end of function [-Wthread-safety-analysis] | 982 | } | | ^ | kernel/futex/core.c:976:2: note: spinlock acquired here | 976 | spin_lock(lock_ptr); | | ^ | kernel/futex/core.c:982:1: warning: expecting spinlock 'q->lock_ptr' to b= e held at the end of function [-Wthread-safety-analysis] | 982 | } | | ^ | kernel/futex/core.c:966:6: note: spinlock acquired here | 966 | void futex_q_lockptr_lock(struct futex_q *q) | | ^ | 2 warnings generated. Where we have: extern void futex_q_lockptr_lock(struct futex_q *q) __acquires(q->lock_ptr= ); .. void futex_q_lockptr_lock(struct futex_q *q) { spinlock_t *lock_ptr; /* * See futex_unqueue() why lock_ptr can change. */ guard(rcu)(); retry: >> lock_ptr =3D READ_ONCE(q->lock_ptr); spin_lock(lock_ptr); ... } At the time of the above report (prior to removal of the 'atomic' flag), Clang Thread Safety Analysis's alias analysis resolved 'lock_ptr' to 'atomic ? __u.__val : q->lock_ptr' (now just '__u.__val'), and used this as the identity of the context lock given it cannot "see through" the inline assembly; however, we want 'q->lock_ptr' as the canonical context lock. While for code generation the compiler simplified to '__u.__val' for pointers (8 byte case -> 'atomic' was set), TSA's analysis (a) happens much earlier on the AST, and (b) would be the wrong deduction. Now that we've gotten rid of the 'atomic' ternary comparison, we can return '__u.__val' through a pointer that we initialize with '&x', but then update via a pointer-to-pointer. When READ_ONCE()'ing a context lock pointer, TSA's alias analysis does not invalidate the initial alias when updated through the pointer-to-pointer, and we make it effectively "see through" the __READ_ONCE(). Code generation is unchanged. Link: https://lkml.kernel.org/r/20260121110704.221498346@infradead.org [1] Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202601221040.TeM0ihff-lkp@int= el.com/ Cc: Peter Zijlstra Tested-by: Boqun Feng Reviewed-by: David Laight Signed-off-by: Marco Elver Signed-off-by: Will Deacon --- arch/arm64/include/asm/rwonce.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/rwonce.h b/arch/arm64/include/asm/rwonc= e.h index 9fd24ce..0f3a01d 100644 --- a/arch/arm64/include/asm/rwonce.h +++ b/arch/arm64/include/asm/rwonce.h @@ -42,8 +42,12 @@ */ #define __READ_ONCE(x) \ ({ \ - typeof(&(x)) __x =3D &(x); \ - union { __rwonce_typeof_unqual(*__x) __val; char __c[1]; } __u; \ + auto __x =3D &(x); \ + auto __ret =3D (__rwonce_typeof_unqual(*__x) *)__x; \ + /* Hides alias reassignment from Clang's -Wthread-safety. */ \ + auto __retp =3D &__ret; \ + union { typeof(*__ret) __val; char __c[1]; } __u; \ + *__retp =3D &__u.__val; \ switch (sizeof(x)) { \ case 1: \ asm volatile(__LOAD_RCPC(b, %w0, %1) \ @@ -68,7 +72,7 @@ default: \ __u.__val =3D *(volatile typeof(*__x) *)__x; \ } \ - __u.__val; \ + *__ret; \ }) =20 #endif /* !BUILD_VDSO */