From nobody Thu Apr 9 03:30:02 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D33C3BF682; Wed, 11 Mar 2026 09:03:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773219835; cv=none; b=PGP+sGOmTfBBbN93odp+nSxCO7eeBS92emtDFKWuB/P8KkzaPLBwWa3JxC9O/dq4lCmJ0vc/5vE9WzfHjIEOihv731eik25xJl5yiTFwWM5GCF8ub5K/7ceD1MWRxk+XO8XXXKvi8gzsfH5RlYlvgQK9SFyoO/c9Wa5YCu5DLog= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773219835; c=relaxed/simple; bh=D0YCDZOM2mGCWciZNHlIT9bt/bATqE95EOHqyn6/bGc=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=Vv1PccZbXWwER6CHX8B+Nx9PuR/4sRUrOlAAq+x8fFFYBGvYvhdIdO3zvxR80bmXrwNs14ld0u7E3WLQSs3B9B3JbPmu2cSsFAMjOOPeagrsnsYbU9NnBO+8ZrQtbh4q1GZT4kZarDvOFYrN6JrVnsJFNKSvqgvukpbxoADVtU0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=R0niVSI4; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=MND82V4A; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="R0niVSI4"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="MND82V4A" Date: Wed, 11 Mar 2026 09:03:47 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773219828; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cjSlXCpxYfUS0uRvaW0hFvbi4oefyYF5vxW31VJ65eM=; b=R0niVSI4QwtljFGCnoA6QWP0hojfAjLRMYXcAHa3XBE2sC35UFkCqABi3fcl/jhzKnl5gN wkmZi3101FS7H8s4hwi5E0DvV3kbPjdInhlfmOxRIjA97XL9b7fGlzgC6MZK+oOSBqgukJ VAWndHLswbUHfF6UESiQu7dhlictVdaYVNbpbrdU0lcM8cuN44fl4xlpCWzMDXxZPTHk0b aaaYk9k4rkTRPalzjxNBYtBFNa3SJd0UUNCSCBpAnefguphEi7TMrQJIjaTlGxy/5U7WrY 5+HpJtfAsGlGH6wijeHKDIPVuHeljF3FvxTlruKGkaSjoHpa4gG2pm+Q87Mj4Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773219828; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cjSlXCpxYfUS0uRvaW0hFvbi4oefyYF5vxW31VJ65eM=; b=MND82V4AMK5I5wJ8xZFGBC4vrH+9yl3C4CpXN1DBFWirqSyNJuTcsc0PpRWZQp/H3e/XZU taBQFagT7BnWaaBw== From: "tip-bot2 for Janne Grunau" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/apple-aic: Add support for "apple,t8122-aic3" Cc: Janne Grunau , Thomas Gleixner , Sven Peter , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260223-irq-apple-aic3-v3-2-2b7328076b8d@jannau.net> References: <20260223-irq-apple-aic3-v3-2-2b7328076b8d@jannau.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177321982701.1647592.1447062035602040084.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 1f0cf05155175849e2f747d26ef1d59e97e280db Gitweb: https://git.kernel.org/tip/1f0cf05155175849e2f747d26ef1d59e9= 7e280db Author: Janne Grunau AuthorDate: Mon, 23 Feb 2026 21:42:47 +01:00 Committer: Thomas Gleixner CommitterDate: Wed, 11 Mar 2026 09:59:29 +01:00 irqchip/apple-aic: Add support for "apple,t8122-aic3" Introduce support for the new AICv3 hardware block in t8122 and t603x SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset. These MMIO offsets are coded as properties of the "aic,3" node in Apple's device tree. The actual offsets are the same for all SoCs starting from M3 through at least M5. So do not bother to follow suit but use AICv3 specific defines in the driver. The compatible string is SoC specific so future SoCs with AICv3 and different offsets would just use their own compatible string as base and add their new offsets. Signed-off-by: Janne Grunau Signed-off-by: Thomas Gleixner Reviewed-by: Sven Peter Link: https://patch.msgid.link/20260223-irq-apple-aic3-v3-2-2b7328076b8d@ja= nnau.net --- drivers/irqchip/irq-apple-aic.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-ai= c.c index 2b24c82..4a3141d 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -134,8 +134,12 @@ =20 #define AIC2_IRQ_CFG 0x2000 =20 +/* AIC v3 registers (MMIO) */ +#define AIC3_IRQ_CFG 0x10000 + /* * AIC2 registers are laid out like this, starting at AIC2_IRQ_CFG: + * AIC3 registers use the same layout but start at AIC3_IRQ_CFG: * * Repeat for each die: * IRQ_CFG: u32 * MAX_IRQS @@ -293,6 +297,15 @@ static const struct aic_info aic2_info __initconst =3D= { .local_fast_ipi =3D true, }; =20 +static const struct aic_info aic3_info __initconst =3D { + .version =3D 3, + + .irq_cfg =3D AIC3_IRQ_CFG, + + .fast_ipi =3D true, + .local_fast_ipi =3D true, +}; + static const struct of_device_id aic_info_match[] =3D { { .compatible =3D "apple,t8103-aic", @@ -310,6 +323,10 @@ static const struct of_device_id aic_info_match[] =3D { .compatible =3D "apple,aic2", .data =3D &aic2_info, }, + { + .compatible =3D "apple,t8122-aic3", + .data =3D &aic3_info, + }, {} }; =20 @@ -620,7 +637,7 @@ static int aic_irq_domain_map(struct irq_domain *id, un= signed int irq, u32 type =3D FIELD_GET(AIC_EVENT_TYPE, hw); struct irq_chip *chip =3D &aic_chip; =20 - if (ic->info.version =3D=3D 2) + if (ic->info.version =3D=3D 2 || ic->info.version =3D=3D 3) chip =3D &aic2_chip; =20 if (type =3D=3D AIC_EVENT_TYPE_IRQ) { @@ -991,7 +1008,7 @@ static int __init aic_of_ic_init(struct device_node *n= ode, struct device_node *p =20 break; } - case 2: { + case 2 ... 3: { u32 info1, info3; =20 info1 =3D aic_ic_read(irqc, AIC2_INFO1); @@ -1065,7 +1082,7 @@ static int __init aic_of_ic_init(struct device_node *= node, struct device_node *p off +=3D irqc->info.die_stride; } =20 - if (irqc->info.version =3D=3D 2) { + if (irqc->info.version =3D=3D 2 || irqc->info.version =3D=3D 3) { u32 config =3D aic_ic_read(irqc, AIC2_CONFIG); =20 config |=3D AIC2_CONFIG_ENABLE; @@ -1116,3 +1133,4 @@ err_unmap: =20 IRQCHIP_DECLARE(apple_aic, "apple,aic", aic_of_ic_init); IRQCHIP_DECLARE(apple_aic2, "apple,aic2", aic_of_ic_init); +IRQCHIP_DECLARE(apple_aic3, "apple,t8122-aic3", aic_of_ic_init);