From nobody Wed Apr 8 03:09:22 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 244523D47C0; Tue, 10 Mar 2026 17:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773164264; cv=none; b=Z4BTyxa7kdxhwHw1Hxly7NRmWubQEh+5WJ7L/9PSTlGtmOj6nvA63bkMECAePMkdSw/L8WDg6pa15laMwY4H+M0ZKOsDkG4F7xbYdP1tBAks0vJoclX3Q1i3nATh8/QaX05AYEySJNswiqYIeQAWm1o0ttJ/1vNolgwDd/LU7ls= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773164264; c=relaxed/simple; bh=B5krn46LJSUBBXtSfQOAV+2zhYFD0Haex8gcJh23JEM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=SKhIqOr50WoMFvbopzmQkUfX1IXzKXbxbmXeY4TgDTmJl/iYMTByGt5uvhj9PC/Ui122r8ISJJ+xRIZrhLlntdlw70esasYJ+slme6R5V2qGXXt5rEx/k6b2+Sf5kE7x5rjfK9UpvljNqTotOyZ9qvP5FkVJzOCTpmazXfWi6Dk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=xoSkxnWq; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=mMfoeiBe; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="xoSkxnWq"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="mMfoeiBe" Date: Tue, 10 Mar 2026 17:37:39 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773164260; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Jf4H5+HRIGY3RzQ056PfelFSCzfoWM1FMyuK77G2TsU=; b=xoSkxnWqmbK8MPUgCrXm6mrjQemOnQQjyQO0415RS9X8zgNpdTZG+0LBkmoa1hWBrfvkaJ xuLtbpyeZPdEMSnhz4bP1dy/aSW3rco7SVNybKxDA2l5VvR1oNGkllQjmVPkjwyjxxPit0 GHRP5t7Su6w4pdCNrb8PW0csHq/s+tZp+Nh6Wpfd0N3H/ZPKnEX1dVuQSE5tLaqTgVjaZ0 CfZa74OD4morIOkgDWHmuHNwS4vS9hzIxY/7UvBzNPJB/b8/H7lmXc0MfxSxxeHhu/8TAJ AgmPu1QoPOosZV+yrCz3rWzUze/kQ4+tpjFUjLsQ+bnDK2JNFYXeaAniwuHSMA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773164260; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Jf4H5+HRIGY3RzQ056PfelFSCzfoWM1FMyuK77G2TsU=; b=mMfoeiBeWjuuSMSO+UIMYo5uSWbOd8m+bATxeh0Z3naMsZIa1kktE+sJ7QkuJxVUKqngnp ttm0c6EB1eLQydDA== From: "tip-bot2 for Lad Prabhakar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/renesas-rzv2h: Clarify IRQ range definitions and tighten TINT validation Cc: Lad Prabhakar , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260304113317.129339-5-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20260304113317.129339-5-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177316425940.1647592.6980290881714031637.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 9dc4335758c983045ab38871e2411fa1ae7e438d Gitweb: https://git.kernel.org/tip/9dc4335758c983045ab38871e2411fa1a= e7e438d Author: Lad Prabhakar AuthorDate: Wed, 04 Mar 2026 11:33:14=20 Committer: Thomas Gleixner CommitterDate: Tue, 10 Mar 2026 18:34:51 +01:00 irqchip/renesas-rzv2h: Clarify IRQ range definitions and tighten TINT valid= ation Introduce ICU_IRQ_LAST and ICU_TINT_LAST macros to make range boundaries explicit and reduce the chance of off-by-one errors. Extract the TINT information up front in rzv2h_icu_alloc() and validate the resulting hardware IRQ against the full TINT range [ICU_TINT_START, ICU_TINT_LAST]. [ tglx: Convert the hard to parse inverse conditions to use a simple helper macro hwirq_within() which is easy to read, less error prone and avoids a lot of typing ] Signed-off-by: Lad Prabhakar Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260304113317.129339-5-prabhakar.mahadev-la= d.rj@bp.renesas.com --- drivers/irqchip/irq-renesas-rzv2h.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-rene= sas-rzv2h.c index 444da78..7ebc0f9 100644 --- a/drivers/irqchip/irq-renesas-rzv2h.c +++ b/drivers/irqchip/irq-renesas-rzv2h.c @@ -25,9 +25,11 @@ /* DT "interrupts" indexes */ #define ICU_IRQ_START 1 #define ICU_IRQ_COUNT 16 -#define ICU_TINT_START (ICU_IRQ_START + ICU_IRQ_COUNT) +#define ICU_IRQ_LAST (ICU_IRQ_START + ICU_IRQ_COUNT - 1) +#define ICU_TINT_START (ICU_IRQ_LAST + 1) #define ICU_TINT_COUNT 32 -#define ICU_NUM_IRQ (ICU_TINT_START + ICU_TINT_COUNT) +#define ICU_TINT_LAST (ICU_TINT_START + ICU_TINT_COUNT - 1) +#define ICU_NUM_IRQ (ICU_TINT_LAST + 1) =20 /* Registers */ #define ICU_NSCNT 0x00 @@ -489,6 +491,8 @@ static const struct irq_chip rzv2h_icu_chip =3D { IRQCHIP_SKIP_SET_WAKE, }; =20 +#define hwirq_within(hwirq, which) ((hwirq) >=3D which##_START && (hwirq) = <=3D which##_LAST) + static int rzv2h_icu_alloc(struct irq_domain *domain, unsigned int virq, u= nsigned int nr_irqs, void *arg) { @@ -508,11 +512,11 @@ static int rzv2h_icu_alloc(struct irq_domain *domain,= unsigned int virq, unsigne * hwirq is embedded in bits 0-15. * TINT is embedded in bits 16-31. */ - if (hwirq >=3D ICU_TINT_START) { - tint =3D ICU_TINT_EXTRACT_GPIOINT(hwirq); + tint =3D ICU_TINT_EXTRACT_GPIOINT(hwirq); + if (tint || hwirq_within(hwirq, ICU_TINT)) { hwirq =3D ICU_TINT_EXTRACT_HWIRQ(hwirq); =20 - if (hwirq < ICU_TINT_START) + if (!hwirq_within(hwirq, ICU_TINT)) return -EINVAL; } =20