From nobody Thu Apr 9 06:37:28 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F91613AA2D; Tue, 10 Mar 2026 11:30:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773142224; cv=none; b=YO4qxKZuHJW+osxXZ1dSrgh0gg6zZnkmL9UBVJplUt6IoOToQhlrTerVcgf3pchOVFtWJ2ZS2jfbfJbW5X//ha/4qI3Q7981TEXduf4UzFuY2+CiWgZT9P4Ns2mEjSfcy41pXc5zxL5NYSziuKQk6m0KHMUN9WPndX/+yZJKT9Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773142224; c=relaxed/simple; bh=5dxMkmcMTRJCANT7ur+qrlnoEn51+WynA7SQrZWNl14=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=lPhgMz+N5QZ2KvIX/+uMnYN8qiB0eDMHbUg3zx2YKQcVJj5AR08s0HXqiUQERxyrz+ym9pWpfHAA59jKKqRhLdfsMaly0S17KDPNw2aofAy8kXEejVAKUb/qY2/vq6wUfZ2kmaz50xN4g9puiXxACsr/4xnpwKJDrTCOK1FlpSA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=b+m/1S2o; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=501mPmZf; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="b+m/1S2o"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="501mPmZf" Date: Tue, 10 Mar 2026 11:30:18 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1773142220; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XiZlhwFInsp1ZzCDTLYoYKEclXrMSG/DcKbMKagv/5E=; b=b+m/1S2ollX3Sf1mUmYWS2YoCe52V20fCMaS9VY36OAv7YdkHmVXKJZz11g8XHKxzeB/Hl N1e5lZsdv2vh+HeZDXDNjOYgmJo6xLgNhGcEtLuAMHcfMs3Amp+amM62bdZrZv0x2ekzFW NXFraTWcVtOQpaWyhzY5J4J+N4We78NWW2BeSq7viqWpJiPDrlNcv4UUwJ6NxZrmXMPB8J 1ltq/kiKxXnRAgnsKNl9Z3Qs0bY4FEk4Bpkx4bJppLxlBZNJxPWtTp5NJws6JepiM3xKND ned62MOoaGPNLPSK7E5S4Fi5/8FU+YboN334oQyIZ11cO9Q61YWEzlvrM7RcnQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1773142220; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XiZlhwFInsp1ZzCDTLYoYKEclXrMSG/DcKbMKagv/5E=; b=501mPmZf2v/w3yGWG6JUMT/mQsnNt9Cy+lbdNjnLAhE9eYMTKEljtaxHTell5QDhT8AaAB H1DhAzot/hQvc6Bw== From: "tip-bot2 for Shashank Balaji" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/apic: Disable x2apic on resume if the kernel expects so Cc: Rahul Bukte , Shashank Balaji , "Borislav Petkov (AMD)" , Thomas Gleixner , Sohil Mehta , stable@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260306-x2apic-fix-v2-1-bee99c12efa3@sony.com> References: <20260306-x2apic-fix-v2-1-bee99c12efa3@sony.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177314221882.1647592.12793884992153068927.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 8cc7dd77a1466f0ec58c03478b2e735a5b289b96 Gitweb: https://git.kernel.org/tip/8cc7dd77a1466f0ec58c03478b2e735a5= b289b96 Author: Shashank Balaji AuthorDate: Fri, 06 Mar 2026 14:46:28 +09:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 10 Mar 2026 11:57:56 +01:00 x86/apic: Disable x2apic on resume if the kernel expects so When resuming from s2ram, firmware may re-enable x2apic mode, which may have been disabled by the kernel during boot either because it doesn't support I= RQ remapping or for other reasons. This causes the kernel to continue using the xapic interface, while the hardware is in x2apic mode, which causes hangs. This happens on defconfig + bare metal + s2ram. Fix this in lapic_resume() by disabling x2apic if the kernel expects it to = be disabled, i.e. when x2apic_mode =3D 0. The ACPI v6.6 spec, Section 16.3 [1] says firmware restores either the pre-sleep configuration or initial boot configuration for each CPU, includi= ng MSR state: When executing from the power-on reset vector as a result of waking from = an S2 or S3 sleep state, the platform firmware performs only the hardware initialization required to restore the system to either the state the platform was in prior to the initial operating system boot, or to the pre-sleep configuration state. In multiprocessor systems, non-boot processors should be placed in the same state as prior to the initial operating system boot. (further ahead) If this is an S2 or S3 wake, then the platform runtime firmware restores minimum context of the system before jumping to the waking vector. This includes: CPU configuration. Platform runtime firmware restores the pre-sleep configuration or initial boot configuration of each CPU (MSR, MTRR, firmware update, SMBase, and so on). Interrupts must be disabled (for IA-32 processors, disabled by CLI instruction). (and other things) So at least as per the spec, re-enablement of x2apic by the firmware is allowed if "x2apic on" is a part of the initial boot configuration. [1] https://uefi.org/specs/ACPI/6.6/16_Waking_and_Sleeping.html#initializ= ation [ bp: Massage. ] Fixes: 6e1cb38a2aef ("x64, x2apic/intr-remap: add x2apic support, including= enabling interrupt-remapping") Co-developed-by: Rahul Bukte Signed-off-by: Rahul Bukte Signed-off-by: Shashank Balaji Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Thomas Gleixner Reviewed-by: Sohil Mehta Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260306-x2apic-fix-v2-1-bee99c12efa3@sony.c= om --- arch/x86/kernel/apic/apic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index d93f87f..961714e 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1894,6 +1894,7 @@ void __init check_x2apic(void) =20 static inline void try_to_enable_x2apic(int remap_mode) { } static inline void __x2apic_enable(void) { } +static inline void __x2apic_disable(void) { } #endif /* !CONFIG_X86_X2APIC */ =20 void __init enable_IR_x2apic(void) @@ -2456,6 +2457,11 @@ static void lapic_resume(void *data) if (x2apic_mode) { __x2apic_enable(); } else { + if (x2apic_enabled()) { + pr_warn_once("x2apic: re-enabled by firmware during resume. Disabling\n= "); + __x2apic_disable(); + } + /* * Make sure the APICBASE points to the right address *