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Sun, 25 Jan 2026 03:33:37 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Donald Hunter , Jiri Pirko , Jonathan Corbet , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , Mark Bloch , , , , , Gal Pressman , Moshe Shemesh , Carolina Jubran , Cosmin Ratiu , Jiri Pirko , Randy Dunlap , Simon Horman , Krzysztof Kozlowski Subject: [PATCH net-next V6 10/14] net/mlx5: Add a shared devlink instance for PFs on same chip Date: Sun, 25 Jan 2026 13:31:59 +0200 Message-ID: <1769340723-14199-11-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1769340723-14199-1-git-send-email-tariqt@nvidia.com> References: <1769340723-14199-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AEA:EE_|CY3PR12MB9629:EE_ X-MS-Office365-Filtering-Correlation-Id: 85347287-596e-40c0-327e-08de5c05a002 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?sNDsiM57YD+TXDreysszFkp3qfWKEaTAiuIm1uzc1DYDIweVemm0+C1Re3NF?= =?us-ascii?Q?hXaXIDeAuEy5dRgIYrLJGN8VCnZFSaGbOQRicdzkhu0UDRtgD0HGD861XY3z?= =?us-ascii?Q?O3JH7N45VaOKqgg2fZPqkVJhUg/tdHoGrK0ACusADeW39Futviicieiyz7+/?= =?us-ascii?Q?JGcsdqUjyWycQlOVDZwkAycB5B85qIA4IGWqXvFgXVFvBPt+WYGGW9mQEmBO?= =?us-ascii?Q?j1guhZlvPFJEEQAPmbDm42ZgulrA+V1ZgwZHa5PO6Q0+l5U+pCzgopUmlyQI?= =?us-ascii?Q?4RfjvtZ2Q+/WtHX8WlQukR6vuVOEEzOm5UuHXAzvCDSWMYYkc7Y1AlvFBv07?= =?us-ascii?Q?9cZKkkQh8n+c2HOg6GLnzKHGksC1gifJC0YWCsGJ+y7QbPihThvWIcGtudEv?= =?us-ascii?Q?9+CtsTYePMxBmKJEfoB9GLPQcRLyMOMbWy8AdmFwttg7Xxbu7QVaczVZ9iys?= =?us-ascii?Q?So2JIkVpeSq0TxkcA/1Tg4fJnSFUhL+5I5IjQsI8+oS5adaVSG+KBK2bJZG+?= =?us-ascii?Q?DpGGRuybJmugZ0X2FSCadW2H2oiuJ6u2/DlnY6QRdzMeRH5NMGoWXZoSrLwb?= =?us-ascii?Q?N0JWtM+k0VUhlXuhC4ubIrXciWrxRCPVlq4VIUcNiDpurmnNy8jcdrmv/KaF?= =?us-ascii?Q?yDRcP0AIaM8pw5jLLAlDFaGDMqQEDcvEe1kFXTMa/LynvCzmQNxt/qPXN3rS?= =?us-ascii?Q?Btv9+OcYGydHcyRsMELzhAwYSqnG6Y8OzigAHKZeBpomKf/IQj2NSwAFeRTR?= =?us-ascii?Q?MTE1dis15nKyuk052jSLaOfxT8S6R8vv80p4p1Lvl3Pk2eBqwfF8n42by13x?= =?us-ascii?Q?zIBGm+V6I+VDOJrtcoEYr3AmjL1YfHrrTnvr7FSTto3woq45B8nEPtLHVqzk?= =?us-ascii?Q?Mtmo3JsjgmhgeYQw9ewSP5UckDFeKniL0DogpDoc/ouppnbofzAhN+p03Oj0?= =?us-ascii?Q?ce/v3DgF6rVRXnL8QAgoJ8ZF6qLMguWBY2FKZTcdVYOCV8GNDZbseQqwI5Ym?= =?us-ascii?Q?qMWEh799mRqzqxWqsvC6dpvKueCP66CATxFAods8SNljO3i/eEc6YfTbUlO6?= =?us-ascii?Q?7h2vBrYvRSQ9Zh1xB2vl+UwWLWo7MQs8cvQ49/oa0j29i58x+jc+jTuGH4gk?= =?us-ascii?Q?e6r26LiveBuB5SISqrO+rNNbMNqcDAN6VR4UcjdE6VbIj2nnmnUFzykoxril?= =?us-ascii?Q?hLXXp1tI9f0q8e6rNw1EtN2O5isMRyR50gcFY8HNdFo6qlsPeUdpGx4IdSXI?= =?us-ascii?Q?NmCkHJ9wZ4zpqFCSl8MRJsz+TkBJ6vqQPjfZCNVnYaJD3nCfxHH5+t+xSR0L?= =?us-ascii?Q?LYXNW/Z7D8lGsPq0hHNb/Hn3NypMK4T1hIuIC0ThdIJaCPf1bGwKKts5Twpj?= =?us-ascii?Q?n+hpvZiSgL+dJm3LwS+pfZ4apGe7UHgqy6d37vRxUr00iHqH0VnCxjGsZFdb?= =?us-ascii?Q?gwzrxAm1Dv3XZDDgtGE+qHIDrPLGgSywMKr+Ey29NTY1Cn7870qYunMtUG4z?= =?us-ascii?Q?28Qb42gXTRBcNkNQQNhXFEsj1PRYfCHWvHNvMFP59V1cQA//zU0s3X7zG7j5?= =?us-ascii?Q?EPDHZ0Ib/uc479hm1tKf1OmwGehwH6D2g6Q1OVNRRflmoyCgORA04HRIkJ3f?= =?us-ascii?Q?1jefJncki2NjnvKt3Bfr4eSQX6L17BOns5txnJ1821AKZF7EuBUTb5b+dOrV?= =?us-ascii?Q?Qk6XKA=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2026 11:33:56.0945 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 85347287-596e-40c0-327e-08de5c05a002 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AEA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9629 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jiri Pirko Use the previously introduced shared devlink infrastructure to create a shared devlink instance for mlx5 PFs that reside on the same physical chip. The shared instance is identified by the chip's serial number extracted from PCI VPD (V3 keyword, with fallback to serial number for older devices). Each PF that probes calls mlx5_shd_init() which extracts the chip serial number and uses devlink_shd_get() to get or create the shared instance. When a PF removes, mlx5_shd_uninit() calls devlink_shd_put() to release the reference. The shared instance is automatically destroyed when the last PF removes. Make the PF devlink instances nested in this shared devlink instance, allowing userspace to identify which PFs belong to the same physical chip. Example: $ devlink dev pci/0000:08:00.0: nested_devlink: auxiliary/mlx5_core.eth.0 faux/mlx5_core_83013c12b77faa1a30000c82a1045c91: nested_devlink: pci/0000:08:00.0 pci/0000:08:00.1 auxiliary/mlx5_core.eth.0 pci/0000:08:00.1: nested_devlink: auxiliary/mlx5_core.eth.1 auxiliary/mlx5_core.eth.1 Signed-off-by: Jiri Pirko Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/Makefile | 5 +- .../net/ethernet/mellanox/mlx5/core/main.c | 17 +++++ .../ethernet/mellanox/mlx5/core/sh_devlink.c | 71 +++++++++++++++++++ .../ethernet/mellanox/mlx5/core/sh_devlink.h | 12 ++++ include/linux/mlx5/driver.h | 1 + 5 files changed, 104 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.c create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net= /ethernet/mellanox/mlx5/core/Makefile index 8ffa286a18f5..d39fe9c4a87c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile +++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile @@ -16,8 +16,9 @@ mlx5_core-y :=3D main.o cmd.o debugfs.o fw.o eq.o uar.o p= agealloc.o \ transobj.o vport.o sriov.o fs_cmd.o fs_core.o pci_irq.o \ fs_counters.o fs_ft_pool.o rl.o lag/debugfs.o lag/lag.o dev.o events.o w= q.o lib/gid.o \ lib/devcom.o lib/pci_vsc.o lib/dm.o lib/fs_ttc.o diag/fs_tracepoint.o \ - diag/fw_tracer.o diag/crdump.o devlink.o diag/rsc_dump.o diag/reporter_v= nic.o \ - fw_reset.o qos.o lib/tout.o lib/aso.o wc.o fs_pool.o lib/nv_param.o + diag/fw_tracer.o diag/crdump.o devlink.o sh_devlink.o diag/rsc_dump.o \ + diag/reporter_vnic.o fw_reset.o qos.o lib/tout.o lib/aso.o wc.o fs_pool.= o \ + lib/nv_param.o =20 # # Netdev basic diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 4209da722f9a..9cd8361ca00e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -74,6 +74,7 @@ #include "mlx5_irq.h" #include "hwmon.h" #include "lag/lag.h" +#include "sh_devlink.h" =20 MODULE_AUTHOR("Eli Cohen "); MODULE_DESCRIPTION("Mellanox 5th generation network adapters (ConnectX ser= ies) core driver"); @@ -1520,10 +1521,16 @@ int mlx5_init_one(struct mlx5_core_dev *dev) int err; =20 devl_lock(devlink); + if (dev->shd) { + err =3D devl_nested_devlink_set(dev->shd, devlink); + if (err) + goto unlock; + } devl_register(devlink); err =3D mlx5_init_one_devl_locked(dev); if (err) devl_unregister(devlink); +unlock: devl_unlock(devlink); return err; } @@ -2015,6 +2022,13 @@ static int probe_one(struct pci_dev *pdev, const str= uct pci_device_id *id) goto pci_init_err; } =20 + err =3D mlx5_shd_init(dev); + if (err) { + mlx5_core_err(dev, "mlx5_shd_init failed with error code %d\n", + err); + goto shd_init_err; + } + err =3D mlx5_init_one(dev); if (err) { mlx5_core_err(dev, "mlx5_init_one failed with error code %d\n", @@ -2026,6 +2040,8 @@ static int probe_one(struct pci_dev *pdev, const stru= ct pci_device_id *id) return 0; =20 err_init_one: + mlx5_shd_uninit(dev); +shd_init_err: mlx5_pci_close(dev); pci_init_err: mlx5_mdev_uninit(dev); @@ -2047,6 +2063,7 @@ static void remove_one(struct pci_dev *pdev) mlx5_drain_health_wq(dev); mlx5_sriov_disable(pdev, false); mlx5_uninit_one(dev); + mlx5_shd_uninit(dev); mlx5_pci_close(dev); mlx5_mdev_uninit(dev); mlx5_adev_idx_free(dev->priv.adev_idx); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.c b/drivers= /net/ethernet/mellanox/mlx5/core/sh_devlink.c new file mode 100644 index 000000000000..202f4ae99fa9 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB +/* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserve= d. */ + +#include +#include + +#include "sh_devlink.h" + +static const struct devlink_ops mlx5_shd_ops =3D { +}; + +int mlx5_shd_init(struct mlx5_core_dev *dev) +{ + struct pci_dev *pdev =3D dev->pdev; + unsigned int vpd_size, kw_len; + struct devlink *devlink; + const char *sn; + u8 *vpd_data; + int err =3D 0; + char *end; + int start; + + if (!mlx5_core_is_pf(dev)) + return 0; + + vpd_data =3D pci_vpd_alloc(pdev, &vpd_size); + if (IS_ERR(vpd_data)) { + err =3D PTR_ERR(vpd_data); + return err =3D=3D -ENODEV ? 0 : err; + } + start =3D pci_vpd_find_ro_info_keyword(vpd_data, vpd_size, "V3", &kw_len); + if (start < 0) { + /* Fall-back to SN for older devices. */ + start =3D pci_vpd_find_ro_info_keyword(vpd_data, vpd_size, + PCI_VPD_RO_KEYWORD_SERIALNO, + &kw_len); + if (start < 0) { + err =3D -ENOENT; + goto out; + } + } + sn =3D kstrndup(vpd_data + start, kw_len, GFP_KERNEL); + if (!sn) { + err =3D -ENOMEM; + goto out; + } + /* Firmware may return spaces at the end of the string, strip it. */ + end =3D strchrnul(sn, ' '); + *end =3D '\0'; + + /* Get or create shared devlink instance */ + devlink =3D devlink_shd_get(sn, &mlx5_shd_ops, 0); + kfree(sn); + if (!devlink) { + err =3D -ENOMEM; + goto out; + } + + dev->shd =3D devlink; +out: + kfree(vpd_data); + return err; +} + +void mlx5_shd_uninit(struct mlx5_core_dev *dev) +{ + if (!dev->shd) + return; + + devlink_shd_put(dev->shd); +} diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.h b/drivers= /net/ethernet/mellanox/mlx5/core/sh_devlink.h new file mode 100644 index 000000000000..8ab8d6940227 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/sh_devlink.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserve= d. */ + +#ifndef __MLX5_SH_DEVLINK_H__ +#define __MLX5_SH_DEVLINK_H__ + +#include + +int mlx5_shd_init(struct mlx5_core_dev *dev); +void mlx5_shd_uninit(struct mlx5_core_dev *dev); + +#endif /* __MLX5_SH_DEVLINK_H__ */ diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h index e2d067b1e67b..3657cedc89b1 100644 --- a/include/linux/mlx5/driver.h +++ b/include/linux/mlx5/driver.h @@ -798,6 +798,7 @@ struct mlx5_core_dev { enum mlx5_wc_state wc_state; /* sync write combining state */ struct mutex wc_state_lock; + struct devlink *shd; }; =20 struct mlx5_db { --=20 2.40.1