From nobody Fri Dec 19 10:00:14 2025 Received: from CY7PR03CU001.outbound.protection.outlook.com (mail-westcentralusazon11010005.outbound.protection.outlook.com [40.93.198.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDC6E328635; Tue, 9 Dec 2025 12:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.198.5 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285010; cv=fail; b=iqW8hgmatIPCtsLdmLDLKRMpAi8xk8GlXdfr9kamZ3M8GyiYTHYcCKx0rsvMU7jXlw4a+vVL/NvqziUzj+oJ8kH2v7AglHWpCwCUhr3Wf/xFNPDynhdFZae81IFHc34QKa+8Zfeo/aM2hpTuAXRcLEo5FMybRNHz0IeV8eEoPK0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285010; c=relaxed/simple; bh=yjVlHpsIL8e7U4ktofbPqSwamYYn4u8sjCLLvlyLLs4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=inP20C+Pyl5xxALZPsvdkmNRjvA+pKkHe0cz2k+wVGokEkUPy5d+ajpDTEGHNm08+sM4gtRyTXr8TqmcLTN6AljTqiRjyFBjpp3Vcx4UFgHi2bnnqu+Q2D0CPFqEmuGitQs7Z+myU0RHdrgS1NabHH5UwkvbOtkzUYXrlhKxcR8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=OagUDgO4; arc=fail smtp.client-ip=40.93.198.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="OagUDgO4" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=o4HOLmEZ3zhPAk15dDJWADF4fE39cDgoZg5cCWNJ7gzj5iFYp8Z7iSizoMqeROEKnBUP4YnLB+E31RvrzaPKIYstt87zVWmWpSZ6djr0meNMzC1pcJx3YR3yevZpso7/+PlfiGnpCHHj46syyOmTPjf9jT/YxXhlw9aNE7utVAZ9qYjA/Khct0cln89ThhSadB3Iuw71iu4Dy6ZWcV+g+9O5DFmegFqlg+51Fc6/sIwBgz5HVhZA/gysQSvcEI4vfkkoMGaatliZ9w94doJZZJQ5Dw6G1VGiXEnmdBSpba+jbB85Z9hXHb+/FtzsxklbEqlqjv+8P1c2O0a/mlFPBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=GUuSXIi7E6QRPUxv753YFm+evynWQCgky23IrOOzNwc=; b=Bj23Z2hyzM9w716Py4y825xfbKYDctqmEopLC2U5WD+dwr0k3xzSfVeQqfArI3kjODwGN/LjwU/cqLKsXiME6VTaMklyagJ48r+881TNY/J8qvHxCh+b1R3NyZSI4OBGsRaT5VD6xB0lQtjIRtYyXWews3zJV6NNMXp5ubWB4RK+8WoemT5ZQlhyPb8IAAPqX3c7ebqYipPcmnGEfCw5s5rY0Gdgz4I7+vC5y/fvwC6jQMDrIDtaZaz18GpbuPs3RM+FH7vtNjK+FUolLLA6xcagQ/IpAaSBahZlWyI98H3R9BuMHYX0PkribPwZu+xMZmFSITvNZC3mp6Lu58bKjA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=GUuSXIi7E6QRPUxv753YFm+evynWQCgky23IrOOzNwc=; b=OagUDgO4NhqH/6t/bcvHU9Vw35aSMGSmp7B6w+cgIdKIhhdNwoALXxsibXH/J1EEE3swMlcXmL9ftcTjHsl5jw7qhz3nyQFCJ8mPA80IGQSNgjWYNGJgNS0KnmiHZnng0Fs+RS6ayTu0Gf6/zSlAIcrjSODalxWFjvWKlZDOSve7R9KEixrs/DXjhmVs1ESNOaz7p7VTE02JpBfX7U4t34G19ADxmuxQZ1/BZgLyjz9kU4YqfNW8iPxmorbQ2QbrXRzy+JGHK1YmuFKrbwnSbb0XIqjxELimMzG7ClvE58tefOWbUdbeHc/v01kUiKNZUXFESoqDWfWqTvCoR09KRg== Received: from MN2PR07CA0011.namprd07.prod.outlook.com (2603:10b6:208:1a0::21) by SA5PPF8ECEC29A9.namprd12.prod.outlook.com (2603:10b6:80f:fc04::8d5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.14; Tue, 9 Dec 2025 12:56:45 +0000 Received: from BL02EPF0001A103.namprd05.prod.outlook.com (2603:10b6:208:1a0:cafe::22) by MN2PR07CA0011.outlook.office365.com (2603:10b6:208:1a0::21) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.14 via Frontend Transport; Tue, 9 Dec 2025 12:56:25 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BL02EPF0001A103.mail.protection.outlook.com (10.167.241.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Tue, 9 Dec 2025 12:56:45 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:39 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:39 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:35 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen Subject: [PATCH net 1/9] net/mlx5: fw reset, clear reset requested on drain_fw_reset Date: Tue, 9 Dec 2025 14:56:09 +0200 Message-ID: <1765284977-1363052-2-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A103:EE_|SA5PPF8ECEC29A9:EE_ X-MS-Office365-Filtering-Correlation-Id: 805226c6-bd7b-4326-4a14-08de3722685a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|7416014|1800799024|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ai5LDom3qOS73w0+rxq33fDqyBjL+HdfcPjfcbKLmOQQH52JmDlN9+H3tpv/?= =?us-ascii?Q?KK6J/sRGhaCIdzk9HtveOpbgkpL7iyZ7O3jG4getva/gC7ASXV6hXnMZ5614?= =?us-ascii?Q?DXWvCx7a4IMiY5rLYqaRqxadxv3h8TP+IRMPVXKfNFe+EHKLP/q9a3GH77Gb?= =?us-ascii?Q?diBWURpCHCtfVx5XS0ZC3h1a64o6zAV4yLPwYzOyxwJfl+qwQUXv2f5Em9g3?= =?us-ascii?Q?2trrvPt+iWMwpLjZfMeQMsFplE6fVobBnNdoQpRgB5a+emaeoh25JJbHFKiM?= =?us-ascii?Q?7ms8BVLWHTxY14851LWhhj+oBXqwPnwF463ZgNpq4+HWYxIieVOa8HzWERGN?= =?us-ascii?Q?r8QYpZ+Sd0yY2OP4KG0lIDYljoaN9KxI0YVFW8s/sABhuf21dBaKsul/xgyT?= =?us-ascii?Q?DiGpZb6MnECz7Z+L3nqaXIFY9q8mHVIY82N3p6Q3UNw1FaSvWnyllFDPNLMe?= =?us-ascii?Q?DWKT0254i/bGBDanEzxkQ9qHly24SXHfZRiSCN23av8ZD8d5ailmqG8ahZXD?= =?us-ascii?Q?jWfkwnRdjERhG+7dFXxNa0svMIdKzWv3+Nep6FgZ/uOrbgHdzzjJ2SmO92tW?= =?us-ascii?Q?jCfV3CLh9zlWFiK5bsjQme7/WHGduHrgVvCNyHoseIE3zuHjqCKw6Hrfj/Py?= =?us-ascii?Q?8oVYddwg6QerAfGer28p9maO5STF4+CRucDhwXJHidpsYzzbZaugdscwOpUb?= =?us-ascii?Q?otPZ2sqyIoxUyUU7f+Ice0jOJlPanxSKYqNVAgYIV8AKQq5aaekKGFEe+w0A?= =?us-ascii?Q?Jl6yw7NpuEv1lzJj2R0ndCF4HNgtFj/ZUTe8ZNBAytrPso/6oS69UcwA/68g?= =?us-ascii?Q?nJdGmVYlbUZ5jRNYg/5vhGxVE1E24cHyv6Wu5zs/TDojf6Hdvpl9VLEnHxTk?= =?us-ascii?Q?3rbQ6aTrYwq5CdHl10QdqZmMUb1vKKFSWRbe90oELjuHlYhBn8xHRNTpsOS/?= =?us-ascii?Q?Jx8/ombKm5TkRSthzrAyqQUmrACmkKHXyKeNSj2YNb/j9I9cx0hIbbC4TNu7?= =?us-ascii?Q?kw/Vgy5RRLW5arKaSRiDuZhQA2ETxdSDtwtIZw7cPIAgM1DkaaHN3AdA5iY3?= =?us-ascii?Q?Q9Ww7/0FYag8NoNGEDeV12geTlRzDTNsp0lMKjSw7s9Icz9M5DKm32pt5qRr?= =?us-ascii?Q?k8i0dWDD5Ucia33LRN1VcVZUoSYlU6zhiYz9/lHTCZrOkyaW6Ge3a9M1l6OL?= =?us-ascii?Q?EDFxiA4J42uiov+okrOvUKS1TP9ZCpTSzzOdNqBwDmxByb6VHrKTMRH9+H4z?= =?us-ascii?Q?41DZSgEOXsnOqsjXFcHcH2oztecb8bPULyAU7P3SI7W3Gm98f8KLS3JakUiy?= =?us-ascii?Q?oSyvjZ5cROEGQNBfVo5bYQdfXjwSQbZ09XGChaTIQuCxhC5TJsSjBlNol6Z4?= =?us-ascii?Q?s+yNY2FhOFAfJVfH8QMLYdpG2Cge569q9c4wLSzWLCLD/vhdE+tVwncRPdpL?= =?us-ascii?Q?hWVKJMZw7yyh0XAYfyJ2bf10D9TK7eQ6H1XBpiKw28xTZNxnsvqelLx/yrFZ?= =?us-ascii?Q?5VvVNMGks59Ax6ksWmQk5Hut7WYDGqOMWkU/AkOXA+R/Wi7b/cUSoTvuuMJj?= =?us-ascii?Q?rWiw2qV6Mwu8vYQZ9wVohH4J9uLOzjmYkrtasdUG?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(7416014)(1800799024)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:56:45.0703 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 805226c6-bd7b-4326-4a14-08de3722685a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A103.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPF8ECEC29A9 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Moshe Shemesh drain_fw_reset() waits for ongoing firmware reset events and blocks new event handling, but does not clear the reset requested flag, and may keep sync reset polling. To fix it, call mlx5_sync_reset_clear_reset_requested() to clear the flag, stop sync reset polling, and resume health polling, ensuring health issues are still detected after the firmware reset drain. Fixes: 16d42d313350 ("net/mlx5: Drain fw_reset when removing device") Signed-off-by: Moshe Shemesh Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/n= et/ethernet/mellanox/mlx5/core/fw_reset.c index 2bceb42c98cc..b81de792c181 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c @@ -844,7 +844,8 @@ void mlx5_drain_fw_reset(struct mlx5_core_dev *dev) cancel_work_sync(&fw_reset->reset_reload_work); cancel_work_sync(&fw_reset->reset_now_work); cancel_work_sync(&fw_reset->reset_abort_work); - cancel_delayed_work(&fw_reset->reset_timeout_work); + if (test_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags)) + mlx5_sync_reset_clear_reset_requested(dev, true); } =20 static const struct devlink_param mlx5_fw_reset_devlink_params[] =3D { --=20 2.31.1 From nobody Fri Dec 19 10:00:14 2025 Received: from CY7PR03CU001.outbound.protection.outlook.com (mail-westcentralusazon11010008.outbound.protection.outlook.com [40.93.198.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E93D4329C4D; Tue, 9 Dec 2025 12:56:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.198.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285018; cv=fail; b=jz+z27H/Z1Am4GFf6VmozJ+ZzJ1lf8SOMSOWu4+81pK57mCDwwnKHPNy5OjuxUZtGlKYE7EPRnwSpC8KxxP52uPuNOCZfZjR0sGUOWtu1U1GAoU/gSMT2g/euDXtRhGLZwU4mfNRjes/yRdn00mkA+/RwrV4WeMAwcyBceiJbnw= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285018; c=relaxed/simple; bh=NHspva8gO/P7quNc6KJXE6/i8V1XyZ9kvSJtRt40J+w=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZCh+CEggrZPS5T+cR0fWC/qh+dvLch8RjpuUP6vKtXSzD8DkEWtxcJnKm35WUlRoBM6YCHYdyzmoXFtgDGBvv2CZi3qIeN2E40uaer7CP0GyJfn2fisdSKo6Yy5b+2RK8Gb4lH7n2zNJVF3B8YUH0s/ry85fdG1zm1nrIWpU9X0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=XsM7ZpE8; arc=fail smtp.client-ip=40.93.198.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="XsM7ZpE8" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=CknLIt5YHebPt3NV/XNS5kpH2Sgin1P3I68UiHRQe4fgyFr+Us0teoJZrkjmxIVhakgOgb4nvKmHUXBWsrFg7UemeL8xDfZNAKsjuuZTUfEsq9FAMyqXjvJRyazzXkIFbLCPlWN2gZIbMV6mkuPsVIaBlBh9qXY9lwsp4MT1MGx1bGFxRhubMe1Sz2E0Wiw5G2/G0v+8TTiUzxDMiFbrIQkwlRtW7mC1qu6t0jPsll+/GC93O+Yh3WUXfG6OMwlHQD1XhnnlMZsgkIt3ifvNme5/9uuOABlXK1YM/R/PW1SsdrTOSPwHV31t6OPVnaqWM9PofMDXun8hrcghRX02fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=qCPklG2dwE2tluWXQSbZC8sEAm5aXQybxZSkDLzu5lA=; b=TgA3M3MYafUnF950FcQDsYAEaThSLk68vWIHCTJw1COq3xoussmI9pkcHaxyCcbfnv9eWRAElp4xqm2dpV+Gw22xltYGGYH79xzC09UNPMhJ/QIL5PGR0XtEfAJf5eNhil9PU/e08kO3gol7tG7UODKdPKhTpp/WjMJGy3Zb+8TU5oZhszLagA3Zx3wt1Xz/F85ScurijW1P66D5Vaxbd5+KgwXZXYR8kOdkiZXxnndi4Az0qY0Mi5fb7toopv7M+x17Fcw5yV3HQNmNGitbkziInmHkRfEM/zZNfafDi54Lp1nprCJc46NXgzjsU4GFHeNpCV8HcpyjpJsSCfx6RA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qCPklG2dwE2tluWXQSbZC8sEAm5aXQybxZSkDLzu5lA=; b=XsM7ZpE8e36jbVdOqzXDtgSjS/2e7wTSVKWG7HlPImSYM9xb28Up+qf6AKYTlC8eXcXQPMr3kd9s7XVLODVzQHRt2ylQPoCnJzM6vTPzN5cbqGB+GcpDFYR9Vs+kxwXWwoGkxgP7gHus7RClra+iLz+Wi5IGe8IjMRIgUzA3314q7ZjC5QlbRsPch1lEjiLbFIETFaM7Leqb3VSYhH8MJQmPkcNwcrn2e/WTljE3qJVNPw26Ur1RFUyuG2uRo4mCan9KUTGw6YC6WZ546xU3XAgKB9NL03mvLUTYsEw8XBkLcEz81EdGmd1Kk4NAa4jORg0LkcCShpAIxzwKQaecTw== Received: from SJ0PR05CA0205.namprd05.prod.outlook.com (2603:10b6:a03:330::30) by DS0PR12MB9346.namprd12.prod.outlook.com (2603:10b6:8:1be::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.6; Tue, 9 Dec 2025 12:56:51 +0000 Received: from SJ1PEPF00002318.namprd03.prod.outlook.com (2603:10b6:a03:330:cafe::4f) by SJ0PR05CA0205.outlook.office365.com (2603:10b6:a03:330::30) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:56:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by SJ1PEPF00002318.mail.protection.outlook.com (10.167.242.228) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Tue, 9 Dec 2025 12:56:51 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:44 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:43 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:39 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen Subject: [PATCH net 2/9] net/mlx5: Drain firmware reset in shutdown callback Date: Tue, 9 Dec 2025 14:56:10 +0200 Message-ID: <1765284977-1363052-3-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002318:EE_|DS0PR12MB9346:EE_ X-MS-Office365-Filtering-Correlation-Id: f147a8b4-cd46-495d-ba33-08de37226c1c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700013|1800799024|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?HwM7SPWZuKvCrpfpi/BgpfOM6tKAxEaZwt1ctjCoL9JblA9edwQhnT2SpNOZ?= =?us-ascii?Q?0w55+1E3b0RcS0WBQWUhIp0y+cvbfhn9VDDenKVnhgSafR62kR+1pFcgz9gz?= =?us-ascii?Q?3y8oJSoxPUDuEE5FSoN1sWzijREpndPJ4ppeiyJrTtItoO1j/WchFdKKdlw8?= =?us-ascii?Q?CAeoWzTPDtQpU8bNvHG1GHTNRnRgeBjpNn+cPq0faCmZbFUrWMCba82RTWw8?= =?us-ascii?Q?2N/u3NQQjxXabmKK/PsKgPsXTKu6qWm9RMkCDyFGvHcBokZrbSabthaELgBF?= =?us-ascii?Q?gtkoY5N4G0Maqa2lheGU84t0VEzEGX9GVFs3XF25tcz5LTj2i/rh4EcjQs2y?= =?us-ascii?Q?fC7BHK/CGdeQZzTHQEHIcIsqna8Xpyj3T28sZYOYKYkoFUJehceb8h6VgrHj?= =?us-ascii?Q?808pDVPc17vgi1KY/xTSY/UkTWDxRxZG84D70pqsPoLHpxTeDlXFU2CTJy0R?= =?us-ascii?Q?nJSiuYkMbZQAltkY03T0fv/iQGeX5ZKAVds+IkM17DdERL7AHxrpqCbPyAcY?= =?us-ascii?Q?rvd/215PeJoTWgmoJunte/3pXvvOSEcxe14ivlAiOHyfher4OKRBjGcV5hGq?= =?us-ascii?Q?CIn3zfsk9w4gz5dntaJa2zRJyzjytmTZmN+4ntOi0wt0YtMIhGnMU9ZBXNcF?= =?us-ascii?Q?jC9XMCnpFbRa3H9hAOSTiWgUHV55vwUQHv5rzVrpk+Z1RePiOEgMgGCNnRZn?= =?us-ascii?Q?JWRG7oRTZc7XXgOmzQXG3ourvGopPvrnS8DEk6/6/0aV5RB6n3v69wO3N7JB?= =?us-ascii?Q?ZPi9VhGwAoT4LS+EApA9jdPdOANemo1HnjBZcLMD/i6rs3SMUAeR27wLR/fJ?= =?us-ascii?Q?map2scMBbZC3X3J1KrgJqnsTE/dwcdwKtPiWIQXp9TrxMhaOsFv6XGgSySmj?= =?us-ascii?Q?Yowiuyp4cS4IrEJFjdE3NWefjX1aUqdOUo9PGMXcmul2/0cvbmCvxZ7HhUXO?= =?us-ascii?Q?2L7UAlgPdLRO+iJ/ztsDKgqTbCmqHs7HUFC/ZPXbOsko8D/acb3kivHeVkk6?= =?us-ascii?Q?mgXuI5vLPznO5YjjGHYtVjcezo75DEeHjM2uy7A0MNWqAmo23A3MkTDpyrJI?= =?us-ascii?Q?aAXfWRNUH0PVnNFLj8pcLXkajCktJiH7l0o/eyJ7dicraiKkO7tui4eTnvbE?= =?us-ascii?Q?Cr3nwrJ52DQ2qaVyuOkUmMLNqHiFBy2rMOW2fcbLQzXIwi88AVVUAc5SKHGV?= =?us-ascii?Q?WcYVxxMoFwKAgiBPRCql5lKGevWKwYPvOLVZDX6VUKowc45N4qfShZhRQa6E?= =?us-ascii?Q?OoSkZ62c1j/ZzBgIZAoaS/G5eja38iEuBjk59N3S4UBt2hs7UESiK41CEOJD?= =?us-ascii?Q?b0LDN1XDCPRP9eHhEQEM5gX1IcA//WUUynHLcfv3NLCbmOuUhBD4zbultA7r?= =?us-ascii?Q?vv1dj92w8Cxj7KECWkiCb6sbWjo4tOe+DssFFkZ1B6b7Q+wp6LoUDtj0NbqI?= =?us-ascii?Q?S409zk0aEVnJpUsa5v3QCn9PcG6Jr3IslatCOZBzcrwKPKqTjmWN1IL1weYS?= =?us-ascii?Q?79XSFrR2Jjg4ak3YeS/NqgqJtlacIHvFPAKRO61Ju83zLpN5kpUPx6tfnJTM?= =?us-ascii?Q?6P3XnFR6EJMzQALtv/El2PDImfGGTkCO4n25xgXx?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700013)(1800799024)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:56:51.5201 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f147a8b4-cd46-495d-ba33-08de37226c1c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002318.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9346 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Moshe Shemesh Invoke drain_fw_reset() in the shutdown callback to ensure all firmware reset handling is completed before shutdown proceeds. Fixes: 16d42d313350 ("net/mlx5: Drain fw_reset when removing device") Signed-off-by: Moshe Shemesh Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 024339ce41f1..cf53affe61ce 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -2232,6 +2232,7 @@ static void shutdown(struct pci_dev *pdev) =20 mlx5_core_info(dev, "Shutdown was called\n"); set_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state); + mlx5_drain_fw_reset(dev); mlx5_drain_health_wq(dev); err =3D mlx5_try_fast_unload(dev); if (err) --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010030.outbound.protection.outlook.com [52.101.56.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E0351C701F; Tue, 9 Dec 2025 12:57:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.30 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285027; cv=fail; b=QleuzhTsRAKi01SVTzHeB0YaFk8f0+L2QzDB8h09zWASk2WgCwfuL3PouN2R1u/gE4wwK5hDdQkLrhsAUGwwqHvlDw0lw29oB4KmH9pQ8hLufmskuLXEu7Mh9TejYyrW/BR9rektJqtsX6WQp4D3usg2gQEwF/NQBKvcw+NZmzE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285027; c=relaxed/simple; bh=xXMzTOn9TrQozecYWXJVUnLdm9AuZLHXmT1x6McPKYc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lNNX5Y3XaHv43k/aD6QTh3dp4PuIrxxNQUu6dlYWILLzCF5LOyJEHETFY6LiqS7v8cjKKcTSFwpET+rpImos/3NkmsAanmMkLsmTf3sB/0DxHM97/cbkC8bjrjvDwAxkm03FAgBYK7nLDoU5XJXMyFeAi4L2iNgGLNca5c2zG+A= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=jBJJtlx5; arc=fail smtp.client-ip=52.101.56.30 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="jBJJtlx5" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=WlXfHbOf+l5xdYGhzlIwZez9lpLrnAMlNRvWHjWKpvjiDnWr2MbDJ/MP51IVsAlQZBRPGrVH4fprFmTf22mxNEZP/cHnT4OSGqvTBjXVfM8dXUuxhR8aQAjEifZMTN3o8YnSw4UkcRu68qv1OHo+NAm5BOEw4z1+s0o2/ZQrELlZuaawe0K+uhwiWMMVrzxkg5Ia1EhkGD/s7SVDc+DtvJ3iLKJulmFB+DcQLGJF3BvH/0OeVnc+RwxfNrYepP/udLPaubceKt7AEJCff8y1BEfnHgr5cwgemQNrQBS29+LRmTcqnnpkl1d7czGy7OxUolVazGry+TdZWn4boiX8UQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=MvxJIzN6bOO22nLlovBTPtpoEM7kx1wb/usOwR0nrX8=; b=ZgFfY0QJrc1UfmZhAEtgd0LpuewkX4xsLmKgNIVutPtAnJwn0naV508Sp/DtWFZ6cFgd+Thq/ewikLxPyHpX+zQMhQTLCoLbl320bngTwaON7PwV+v8hpdVFAW4qqnVejjEiO4IBmiGWCjj2Vh0fM+qT3ZeY7SVsWyFni9tsTYm4d29H+jmq3JleqT9NF4zAFIdNp1Zo0b7gooWNw8wWy3XsTv3SzQd7ZUIJS1sPOW905NZJ5v+be1u7lBzV2LobnWD7tIgz/Ugks/mrZPBZaQDtL6BUEDfoIIRK+8QBNqRwnGavugDf7rCUnc43aTs96O2uzKJWJmuOa/Kb0RiUzA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MvxJIzN6bOO22nLlovBTPtpoEM7kx1wb/usOwR0nrX8=; b=jBJJtlx5WIeAsOB2zzzScL3fJdgtRj/NXlxpk1cLYEdYlBwNkOZdCQvsCdjygezIjEK1Ag8xDChj3eBZWI1OJpdX8+f8IPg8kQc154SJt/4yK4+vTEso6pvxiSR+CgtbZphVuTgVswi3zXC+DyZsjYhYA+kpC4qGZb0wWI0Iai33CkvhSEmWkQAb2VQCZtkgBRfP28hU+7KBxgeRdqCnXUw2O+kvYvOwCYTGTrxVJbQJGJuDnvmFMV92JHIdsCvj4XaaOLy4ZqiQRq3eWtS5wasaiZBmXHvdKUFn85W6beJHThqCaGNAczUU265he3VkptqCqNM01CxQCs4ZkMXvHQ== Received: from SJ0PR13CA0065.namprd13.prod.outlook.com (2603:10b6:a03:2c4::10) by PH7PR12MB5903.namprd12.prod.outlook.com (2603:10b6:510:1d7::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.14; Tue, 9 Dec 2025 12:56:59 +0000 Received: from SJ1PEPF0000231B.namprd03.prod.outlook.com (2603:10b6:a03:2c4:cafe::be) by SJ0PR13CA0065.outlook.office365.com (2603:10b6:a03:2c4::10) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:56:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by SJ1PEPF0000231B.mail.protection.outlook.com (10.167.242.232) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Tue, 9 Dec 2025 12:56:58 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:48 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:48 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:44 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Shay Drory Subject: [PATCH net 3/9] net/mlx5: fw_tracer, Validate format string parameters Date: Tue, 9 Dec 2025 14:56:11 +0200 Message-ID: <1765284977-1363052-4-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231B:EE_|PH7PR12MB5903:EE_ X-MS-Office365-Filtering-Correlation-Id: b8536ee6-4293-45be-8db2-08de37227055 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|7416014|82310400026|1800799024|13003099007|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?hF6U+BFIe/jHGAtBLUg+54rsuNRWc43oVwa7wREWhncrga/8lPmjaCF3KgSU?= =?us-ascii?Q?3AY2ZNZwF5exX3tUiCJSsaTx6164b47z96TBhiTLDDi7f0OyaHvJx71mez9X?= =?us-ascii?Q?oCcQxszgXATAlMovgmwv6e01mava+whTLI51EHqqzUFwJvPRbc6/M1oRer4Y?= =?us-ascii?Q?SeMkOeudbyLwdRjIbiP0PfuKYuZtMI1jHHRU26H6NZgYqwLAL/GnV+l9XSk3?= =?us-ascii?Q?opytufoAelPY0TMCxPRW82k5EpR/ipokR3L7B9WkF27GVKwXkocD9bOXGyrt?= =?us-ascii?Q?U41bm42/XyhYoUYKVfPlk50YnHc44aMymxWcXbdJTiF+9WDfKAFmEZWkeMV3?= =?us-ascii?Q?melB1Osirs5uiVZYVULihEJ2QMjFb2YuHQ2swVqNmEH7n5phD7trECehM4l3?= =?us-ascii?Q?FEw93e2BvqZvTtFuigW0lFL28cZU4T3rzrRVen5qm3PuYaHpeXmoaJgbqUO3?= =?us-ascii?Q?qmFgmIQcWeX146gnRvUbXclz8GYTwHgH/Hxvd79BwwT7WLDgCzTNi58W173f?= =?us-ascii?Q?vTFcX0uuwicrwUFMlnjDv/4D6Gf9igAeexaFAv2V/QU3GVo/sYGNBpPn5WZp?= =?us-ascii?Q?MB025wZ08+VlRmeOyrxO4lVqnUgFWL8Oz/6H+z55yotKpPa/XJ8Le1n/DYo/?= =?us-ascii?Q?K4dhlC2zq1Ewoxv7Z4085niLY6eCxe8OWsfy0rt9iqBau5gt4gcelA/RtCX3?= =?us-ascii?Q?XGbXynlRGVPfLs0iOFcO8Zk514UIgJsiiidTyWYfiNq6dQ587jRxPvFnoVJt?= =?us-ascii?Q?L5kYALxyZ+3wmeXxHjamqNxVfKmi4mOpi7wjN6U66M/LhBKQ9a6OFVTivMJI?= =?us-ascii?Q?4U1soOUFopNjabHmQe5BKZPjaCfB/JktSzTOw1wDWJWUgP4598qht4km4VTv?= =?us-ascii?Q?qIzLp411Sfr0NhZ9NU4PX2qTW4QLrjAzNNzH8S4aoeXP7IpdyitiDbxa5O6q?= =?us-ascii?Q?RIdp30DbXtxevYznE//10yeXfjjaDhm8O6/2rd4kv0OBu0W9pa01fbVVMJCE?= =?us-ascii?Q?dIQ3/4rXOqepY3AJDCYTR4VqArEdeOXjUExVTszx+7l42EQ1p2ppdhAZeZWC?= =?us-ascii?Q?UwglWIvcTnC4uakRQA1QJCBOv/EJChahV6C5i67LeOV2oVVnOO7oWt4rOs3V?= =?us-ascii?Q?7u/fPJ6KrYY7ZC+x9tKApRanmGp/DLbc6eDQu/ch0E89oJ+LBrjD2z7UNC8i?= =?us-ascii?Q?dJCHvR8nIBHsFMVWoaLfjGQOe6LjZBhfLZnkKt11JOah6QlrKH9mHe/HvehP?= =?us-ascii?Q?Rn+zv3JXcUbNOULI/ebAmWNY+HJPIDxgQBhM+/x5/sNYW8LZv+/vqpZ2GJGV?= =?us-ascii?Q?5aQFsdlcrECbdBTSx816PLuAxuU2aYOz2/b9LLxynbUe2BqS3UP+21FfmK9b?= =?us-ascii?Q?fQkPoFuOFzDaNpDhgONEyr1ocjHzsiA77djTls+cKZNXGQITYO/mLJxXMwRy?= =?us-ascii?Q?zhlcjHh78avWNDcNZ/FI6+O1IVjAjwFpB4HtTeZxSnmCUFvxr8m7qLai+Fbu?= =?us-ascii?Q?AhXxs3Om3L/s/eKrhsQ5H0CbhyAxoHQYf7tX0N2vPN6F8mVsveKVwAjc+Lwf?= =?us-ascii?Q?wLOxh9he7eHNp3FEQ1N6gqFE4ppyZOhb/3gjra9zjEGhVm7VpHG4XocrjC0p?= =?us-ascii?Q?rw=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(36860700013)(7416014)(82310400026)(1800799024)(13003099007)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:56:58.6064 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b8536ee6-4293-45be-8db2-08de37227055 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5903 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory Add validation for format string parameters in the firmware tracer to prevent potential security vulnerabilities and crashes from malformed format strings received from firmware. The firmware tracer receives format strings from the device firmware and uses them to format trace messages. Without proper validation, bad firmware could provide format strings with invalid format specifiers (e.g., %s, %p, %n) that could lead to crashes, or other undefined behavior. Add mlx5_tracer_validate_params() to validate that all format specifiers in trace strings are limited to safe integer/hex formats (%x, %d, %i, %u, %llx, %lx, etc.). Reject strings containing other format types that could be used to access arbitrary memory or cause crashes. Invalid format strings are added to the trace output for visibility with "BAD_FORMAT: " prefix. Fixes: 70dd6fdb8987 ("net/mlx5: FW tracer, parse traces and kernel tracing = support") Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh Reported-by: Breno Leitao Closes: https://lore.kernel.org/netdev/hanz6rzrb2bqbplryjrakvkbmv4y5jlmtthn= vi3thg5slqvelp@t3s3erottr6s/ Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/diag/fw_tracer.c | 83 ++++++++++++++++--- .../mellanox/mlx5/core/diag/fw_tracer.h | 1 + 2 files changed, 74 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c b/dri= vers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c index 7bcf822a89f9..b415dfe5de45 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c @@ -33,6 +33,7 @@ #include "lib/eq.h" #include "fw_tracer.h" #include "fw_tracer_tracepoint.h" +#include =20 static int mlx5_query_mtrc_caps(struct mlx5_fw_tracer *tracer) { @@ -358,6 +359,43 @@ static const char *VAL_PARM =3D "%llx"; static const char *REPLACE_64_VAL_PARM =3D "%x%x"; static const char *PARAM_CHAR =3D "%"; =20 +static bool mlx5_is_valid_spec(const char *str) +{ + /* Parse format specifiers to find the actual type. + * Structure: %[flags][width][.precision][length]type + * Skip flags, width, precision & length. + */ + while (isdigit(*str) || *str =3D=3D '#' || *str =3D=3D '.' || *str =3D=3D= 'l') + str++; + + /* Check if it's a valid integer/hex specifier: + * Valid formats: %x, %d, %i, %u, etc. + */ + if (*str !=3D 'x' && *str !=3D 'X' && *str !=3D 'd' && *str !=3D 'i' && + *str !=3D 'u' && *str !=3D 'c') + return false; + + return true; +} + +static bool mlx5_tracer_validate_params(const char *str) +{ + const char *substr =3D str; + + if (!str) + return false; + + substr =3D strstr(substr, PARAM_CHAR); + while (substr) { + if (!mlx5_is_valid_spec(substr + 1)) + return false; + + substr =3D strstr(substr + 1, PARAM_CHAR); + } + + return true; +} + static int mlx5_tracer_message_hash(u32 message_id) { return jhash_1word(message_id, 0) & (MESSAGE_HASH_SIZE - 1); @@ -419,6 +457,10 @@ static int mlx5_tracer_get_num_of_params(char *str) char *substr, *pstr =3D str; int num_of_params =3D 0; =20 + /* Validate that all parameters are valid before processing */ + if (!mlx5_tracer_validate_params(str)) + return -EINVAL; + /* replace %llx with %x%x */ substr =3D strstr(pstr, VAL_PARM); while (substr) { @@ -570,14 +612,17 @@ void mlx5_tracer_print_trace(struct tracer_string_for= mat *str_frmt, { char tmp[512]; =20 - snprintf(tmp, sizeof(tmp), str_frmt->string, - str_frmt->params[0], - str_frmt->params[1], - str_frmt->params[2], - str_frmt->params[3], - str_frmt->params[4], - str_frmt->params[5], - str_frmt->params[6]); + if (str_frmt->invalid_string) + snprintf(tmp, sizeof(tmp), "BAD_FORMAT: %s", str_frmt->string); + else + snprintf(tmp, sizeof(tmp), str_frmt->string, + str_frmt->params[0], + str_frmt->params[1], + str_frmt->params[2], + str_frmt->params[3], + str_frmt->params[4], + str_frmt->params[5], + str_frmt->params[6]); =20 trace_mlx5_fw(dev->tracer, trace_timestamp, str_frmt->lost, str_frmt->event_id, tmp); @@ -609,6 +654,13 @@ static int mlx5_tracer_handle_raw_string(struct mlx5_f= w_tracer *tracer, return 0; } =20 +static void mlx5_tracer_handle_bad_format_string(struct mlx5_fw_tracer *tr= acer, + struct tracer_string_format *cur_string) +{ + cur_string->invalid_string =3D true; + list_add_tail(&cur_string->list, &tracer->ready_strings_list); +} + static int mlx5_tracer_handle_string_trace(struct mlx5_fw_tracer *tracer, struct tracer_event *tracer_event) { @@ -619,12 +671,18 @@ static int mlx5_tracer_handle_string_trace(struct mlx= 5_fw_tracer *tracer, if (!cur_string) return mlx5_tracer_handle_raw_string(tracer, tracer_event); =20 - cur_string->num_of_params =3D mlx5_tracer_get_num_of_params(cur_string->= string); - cur_string->last_param_num =3D 0; cur_string->event_id =3D tracer_event->event_id; cur_string->tmsn =3D tracer_event->string_event.tmsn; cur_string->timestamp =3D tracer_event->string_event.timestamp; cur_string->lost =3D tracer_event->lost_event; + cur_string->last_param_num =3D 0; + cur_string->num_of_params =3D mlx5_tracer_get_num_of_params(cur_string->= string); + if (cur_string->num_of_params < 0) { + pr_debug("%s Invalid format string parameters\n", + __func__); + mlx5_tracer_handle_bad_format_string(tracer, cur_string); + return 0; + } if (cur_string->num_of_params =3D=3D 0) /* trace with no params */ list_add_tail(&cur_string->list, &tracer->ready_strings_list); } else { @@ -634,6 +692,11 @@ static int mlx5_tracer_handle_string_trace(struct mlx5= _fw_tracer *tracer, __func__, tracer_event->string_event.tmsn); return mlx5_tracer_handle_raw_string(tracer, tracer_event); } + if (cur_string->num_of_params < 0) { + pr_debug("%s string parameter of invalid string, dumping\n", + __func__); + return 0; + } cur_string->last_param_num +=3D 1; if (cur_string->last_param_num > TRACER_MAX_PARAMS) { pr_debug("%s Number of params exceeds the max (%d)\n", diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h b/dri= vers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h index 5c548bb74f07..30d0bcba8847 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h @@ -125,6 +125,7 @@ struct tracer_string_format { struct list_head list; u32 timestamp; bool lost; + bool invalid_string; }; =20 enum mlx5_fw_tracer_ownership_state { --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012047.outbound.protection.outlook.com [40.93.195.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D46B2F656E; Tue, 9 Dec 2025 12:57:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.195.47 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285027; cv=fail; b=F+CN+rzRdMSNznNG4BbTR44OviZCgCZKo1SlQE0YLhSICwTnL6Y3Adljc/aRL1gSpFNfQaZAZ0Zo32ED/m7cVja0Y/OMGyECsyjsE6L+ZHchGVwWF2wuUNd90RvLBCvCcl25pM/+w5LjtYcL/SAJwSbbznFKc1O2FpNuzwDiLqk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285027; c=relaxed/simple; bh=m0x6frNi4fLldzqB/qabNKoQ3cgsj7+dzkGHPRAByJE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=V8ChJ55k2GqiNnZYft/LXUUG31pCBUhe2D5MqktRP1OYcREhJHoIGlTGDvl9FYGAwzHP9+4xRP7gZDrYIRxOIBxgbcdPvmXA2teZ2cPm/c4fHsuh+OyaVdJfvf51l/s2qpG4TV8O0PSHqtcM3YQaSgK5DHUaUIMiXoxgDjdH7Qo= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Sn8zeP31; arc=fail smtp.client-ip=40.93.195.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Sn8zeP31" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Ch07T09LzZJ6R+QaZE8VOwaR5c2U93FEPeOW6c1r8d+1gopWnkKNn9+5KxRNiwxtoMUSexeRupHisgwLkvCYBVAKv1DpevVhBlwWU1LtTg5N3f3OY/WhjlMQoSu4udK7mw7WYf86sJxGnMZTkG4ml8k3uFbufMXU2Z8GKwen6nz9BfzQtxSfy1V3Y+hyUjY7IUQykCuPzFdLLpAGAzmlDk2PYLIKN2U+tTEy8oZR4+dwDwtQrJTBP3rTs5hg9kmE/Jxu+zh30YUxL77i48FaEA2IOxU3xm53m6A+Ww8+mUPYc+upnJETDFYTqRPZxzY445a1cl7tF3UgFC4oWlkDzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jV2NT/14j4NeTau4p9w2Nl073uP6ZA6Lswc1lCcyG/c=; b=vR6wFRdraZxNkxsofkEKIYAQGbfwbDTl6NE0jZkOhbVGAlMlLh8tRlRM0OEUA/FO8kvoAP6Dm1+Rk1Cah+9ztcIUEuWTAwqefcW64BfN/snykHMRME9nCmiZdVLO/LvMEAT1YwyQ5hsksSXGGtysbgrKyq+6d2k8/TNIJ6Ae82N9B+NPSbhTPHG1VFhuacR0sEMuJ3ooTdi7mIlpZ4mnelJRYdUdqlhIheC2xUcykXsS0Uw7ty6ofMqT7QillhXO/ukt5QpvLb3VMIB6ozauS+bBT/m1uUYl6iDWvHgCZfJrNw8yQ6hggkyYdzC5+r7zk6IIa2zZDFmZYt+nF7I2RA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jV2NT/14j4NeTau4p9w2Nl073uP6ZA6Lswc1lCcyG/c=; b=Sn8zeP31q3JphHcPAhtPWoOZKgsCCYOttg+G33iQtsJJ9sAtHj9ZrhXxuY8CsyJIAH6VCNa/FM+z8/5kdKoRO3nexfdo+3l8KZC8fzdW4lPRGctK1zJ6o/YRN3lZFA1ns27fw/MPEitvL4eyzcjPhDT61XVkfy4RjQvcKg3cYLEVgfdg8aJ9LjrH5mnUB5ETeC5Tq88Q8Yc/KtxTigxvtu/tB/CR3hCpTxrefmTjIDo4qw6iGBp/eOs5H6/TCGsoTiAhtXgGI4U2MAFXEKLMNaSTlQlfuakLtqrBFvo62Excj8QivEqzslIqXpq5tvElqXLrcGM1T9U14KJCk6Hmwg== Received: from BN0PR02CA0047.namprd02.prod.outlook.com (2603:10b6:408:e5::22) by DS0PR12MB9038.namprd12.prod.outlook.com (2603:10b6:8:f2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.7; Tue, 9 Dec 2025 12:57:00 +0000 Received: from BL02EPF0001A101.namprd05.prod.outlook.com (2603:10b6:408:e5:cafe::ed) by BN0PR02CA0047.outlook.office365.com (2603:10b6:408:e5::22) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.14 via Frontend Transport; Tue, 9 Dec 2025 12:56:50 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BL02EPF0001A101.mail.protection.outlook.com (10.167.241.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Tue, 9 Dec 2025 12:56:59 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:53 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:52 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:48 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Shay Drory Subject: [PATCH net 4/9] net/mlx5: fw_tracer, Handle escaped percent properly Date: Tue, 9 Dec 2025 14:56:12 +0200 Message-ID: <1765284977-1363052-5-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A101:EE_|DS0PR12MB9038:EE_ X-MS-Office365-Filtering-Correlation-Id: 70b131c5-c21f-43b8-cccb-08de3722711a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|1800799024|36860700013|13003099007|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?amzCsN/Ay/cnNtu587skKPxwN8NR/46T5kzF0fcAN34a8j6SFM33Rt6+QY3b?= =?us-ascii?Q?D0cjTc5PJalJafHSFsHFzFFsmyZjGbxoluNDQrSAXlJZsiIDEN5yn9BTuYi7?= =?us-ascii?Q?txYOihvfLvUfZuYgBR8Z4+v+iXSRV1DTP+647tpM4q/MxZBxlM9jsEk4Y5fW?= =?us-ascii?Q?LCgmcf8MriCFGOsl1r115xUt6c2gwUxHgkKIBleJ45jB2Vm+VMUz89EDYIKs?= =?us-ascii?Q?MBJ+HFETuGCE+9iKa313zfiWRo7CnZaFh2X0qL/yaEoC3zPtPHZhlqku5wyC?= =?us-ascii?Q?ssuaacik/7i4AdcLIftuaksp/JaMrm/gya5fhkY4ACJLo3Wd08/3A0tzP+qt?= =?us-ascii?Q?PoGMBVE/dk9gcbn5mxIJeUTpIOEzrcJmuw9DYlZkFjovMkb1j0eJVHgQqj8O?= =?us-ascii?Q?NlYGB+c1TnKQx42zKCbwGf6OpRLK36n7U5HKqZNFRn1ObFq4IjN5mfkNY+9h?= =?us-ascii?Q?FByxmrsVBMzc1xM4867nnM57N3o0eaduX2ZsvWnPufnIZS6BF0sw75uOn34Q?= =?us-ascii?Q?h+wZsnZ+mXRfwnkgP5mBMDSgBiInNEooLuH+v/ifQCpuzlieKxYWZHpLhnmP?= =?us-ascii?Q?T024kI/HbjXkZonYbf7LG2jTHC/IbAt6a7yKI4cYC52O7CaT1WlgeCL1YnjQ?= =?us-ascii?Q?08Lh8+4L+TG2S9rrJ6n1epRXs8p2O2J+1WswVgNtw0C6cMpWMQ0OQgZL52XU?= =?us-ascii?Q?vnYx7ySW8EzVf3Byc/tdqE0mUs4B358hkqklAFONyNI359TxNF84WIUua7Pi?= =?us-ascii?Q?ax4Wk4Jni2sKgVeiVcqMgxWbRMRGmoOObk9hr6Bz4KaMZJ37mL0igpNns3Cz?= =?us-ascii?Q?TuVqwcJddLAlSWwIMoLt1HjQNTt9MpqInkKiER8b6b92Ch0ZW/A9P2S3AA/P?= =?us-ascii?Q?B3L+mS+kXmOhaWi1xvN022BVLkoau5eGeoYMtmS/xSZbSR5jlXbJD8Ms6RBP?= =?us-ascii?Q?X1ECWNDO8nUHJImcklJhmJ9lK+DRN/mWfbPIPfGx2e12Bvo6zmz692x/Tw2t?= =?us-ascii?Q?E9KoGlU4LYLDKl/lLWJgNVIm0PGMuUJwQeT4A8AuZZvVP806wwmdXWMnOrQl?= =?us-ascii?Q?SG/ICfBaMTtfNabmDieQz9jQV+ysnutjUkoRri3ChrGb1VGgZdxH7wJkZW8S?= =?us-ascii?Q?MrwbeqbP0U09ahFqZe/JV04zRlUaNcoaRhZRdhCXDvJ5/cM+h3j1YxAQlXWE?= =?us-ascii?Q?7iADGxxsc3/HhsbSaCYoAJCgi3hZb6G4pezA599WrdxpUmAfjeyemeOwUttf?= =?us-ascii?Q?JmREXBmt7NChBS4r/OUltIRgmAfJPXHZtcJmnooXLQeHfOhgjJ77y07tR+wW?= =?us-ascii?Q?0nUl3BJtZTyL8Aat1272JSDT5vWtZ5qZutwQJj+CI647YCBZJ53xibhzRq9P?= =?us-ascii?Q?0E7NR9pSeb6wNt6GdcjiEVQbK1WjI0YE/uj+tx9HB553b9sJhTYysFg37SEj?= =?us-ascii?Q?LOj6/Y4WowoKWsU4XT3cTKM3vQjD/t8D2ua30aL5YH2L660QaL1d/4pxnm3V?= =?us-ascii?Q?rLKBGunoUwGtLV++vkq757r4Xf+EFY6Tm8lwvSgQDRbI2E9OrWHwGX4U7kI6?= =?us-ascii?Q?6CxMP41g/FzReBSdItN429qyrc4PYED5vo0aD4Rx0HsHfSuui8fNq9GpnY55?= =?us-ascii?Q?BQ=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(1800799024)(36860700013)(13003099007)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:56:59.7516 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70b131c5-c21f-43b8-cccb-08de3722711a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A101.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9038 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory The firmware tracer's format string validation and parameter counting did not properly handle escaped percent signs (%%). This caused fw_tracer to count more parameters when trace format strings contained literal percent characters. To fix it, allow %% to pass string validation and skip %% sequences when counting parameters since they represent literal percent signs rather than format specifiers. Fixes: 70dd6fdb8987 ("net/mlx5: FW tracer, parse traces and kernel tracing = support") Signed-off-by: Shay Drory Reported-by: Breno Leitao Reviewed-by: Moshe Shemesh Closes: https://lore.kernel.org/netdev/hanz6rzrb2bqbplryjrakvkbmv4y5jlmtthn= vi3thg5slqvelp@t3s3erottr6s/ Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/diag/fw_tracer.c | 20 +++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c b/dri= vers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c index b415dfe5de45..6b4ec457ce22 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c @@ -368,11 +368,11 @@ static bool mlx5_is_valid_spec(const char *str) while (isdigit(*str) || *str =3D=3D '#' || *str =3D=3D '.' || *str =3D=3D= 'l') str++; =20 - /* Check if it's a valid integer/hex specifier: + /* Check if it's a valid integer/hex specifier or %%: * Valid formats: %x, %d, %i, %u, etc. */ if (*str !=3D 'x' && *str !=3D 'X' && *str !=3D 'd' && *str !=3D 'i' && - *str !=3D 'u' && *str !=3D 'c') + *str !=3D 'u' && *str !=3D 'c' && *str !=3D '%') return false; =20 return true; @@ -390,7 +390,11 @@ static bool mlx5_tracer_validate_params(const char *st= r) if (!mlx5_is_valid_spec(substr + 1)) return false; =20 - substr =3D strstr(substr + 1, PARAM_CHAR); + if (*(substr + 1) =3D=3D '%') + substr =3D strstr(substr + 2, PARAM_CHAR); + else + substr =3D strstr(substr + 1, PARAM_CHAR); + } =20 return true; @@ -469,11 +473,15 @@ static int mlx5_tracer_get_num_of_params(char *str) substr =3D strstr(pstr, VAL_PARM); } =20 - /* count all the % characters */ + /* count all the % characters, but skip %% (escaped percent) */ substr =3D strstr(str, PARAM_CHAR); while (substr) { - num_of_params +=3D 1; - str =3D substr + 1; + if (*(substr + 1) !=3D '%') { + num_of_params +=3D 1; + str =3D substr + 1; + } else { + str =3D substr + 2; + } substr =3D strstr(str, PARAM_CHAR); } =20 --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from CH4PR04CU002.outbound.protection.outlook.com (mail-northcentralusazon11013035.outbound.protection.outlook.com [40.107.201.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7826329C64; Tue, 9 Dec 2025 12:57:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.201.35 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285037; cv=fail; b=SwBwGRh3pquJL/rh+O+/AN16cpurepSjKgz43hRlu87bVgkcChMy3Wz5wFnYbbWZ0keApPuzw+Xpm+ZoRCzkdCmgKlnzIz+m4of0sPZeDdYeQV+sTUVmbhcSP+6Q7WuvvYfVP5ModZ+qEvOG5/JqXmN8Bw/pa82LC61XZ1qpbX8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285037; c=relaxed/simple; bh=gIiZoMNlSQWUkiLvjmbdpq3cPHtd8RFAhIQMJK67e/U=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YjYRqmQdoBYCki3KNWE3SY9Lb1RLvE/fOB+SGl19J/LN/O4mE59bZbNwGXnN5oIRl6cOX1MCAGtHTcPPMcmSAkMgMjJc8AnXaf5DnEHZOoIFHzMY7/ZQY2WibTfP6rb8UT5VK0GOXeNegEUhpltCo9kyvrhZD+aleb/4I9Qd92s= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=ISHD/Edj; arc=fail smtp.client-ip=40.107.201.35 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="ISHD/Edj" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=esuxy60VariraSgvZLcDSQIofJUEgthLnhzVxLyUTtDmQtFd9497BZJuTa8X477biVptfho8ZpMAhHxK75vInM0C4mvjQeSUa2tXpII6rUzKycPHC4I/pnSNh5RlYv0vqhSr1Kb3EGwvCqqHwO9rzp/bTOXhKiVFrI992rYtW955y3/Slh+4BJ/TMhVmSh0F9sL28Rq5iCr42vHiIPfVTgt6ai3idOF30OXAJkBN/k59TXFcTXOdhSKK25t3iTbtvGv+0V8xLywSSWSiIUonh7hyIPJfOhQ5nEr+yRqkt/pgXNxae1DqMfCSD5V/CLQyi5h8nm1IUIyhG+59+KTcyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dFPRvYiSLWwaq0YMaIFDZgZz8lupjIucuTciInsJtLw=; b=AVFMfGxucipefx3o/6wkAE2G6Yo3QCpe15iW3Bovl0oienSpNtclaSinTQRsFZaaKiGxEiyrSPzDWr+2QfFuodc9IalqLiIVNvZPJ6IERrzTZkXk7gtfDQu8rs1cYezrcrozOAYvSeQGJ0mk35tEQAdtHJ6sJRFMPkE5UVu2yWyrmNwG6VVo/kpv68Q7zoOzpBrscD1dLljSKEyIlUmArvZxCJRQYgSTfeld2bc/n5AaHrqgAkvtabgshXab6jIoq+OyND6wcoNkT84hrsktCTXyz5fYfD+HzhPlwIKQbPp2FBIrbM57bwpDyWKCwrkHiXxP+8bUy3C4kk2cL2KzTg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dFPRvYiSLWwaq0YMaIFDZgZz8lupjIucuTciInsJtLw=; b=ISHD/EdjdoaQ3YGaD1Hi3TntoJf7aXF9Pkb/AgULblDGcy9w4qD3VXbTgTuW4r6t/Eqzo8PHiWcDvakIQyYUdwSjC/oYIHFrUlhIORnDQNo+BnKLWP10hn1Cy80fodtkLCWE6hzmN9h7ONz8V7hD9/bBR/khz5Md/AdObt1hQVM7FR4qay9RVJWUTbnYGFKP2qIRO6DLHFr7I2nr48rRoeUPcJ8y06E8tTsM7izwfnd7b64xE2mD+3FTFsCbVGZaUtiZxAmOUxo5dz0CLzO352qU+oyV3gr0QMCnzHQ/pRfyV/aGWdWUf/xEqRYdMXIhdP6HXLoxc/L2I6s26NHmDA== Received: from SJ0PR13CA0079.namprd13.prod.outlook.com (2603:10b6:a03:2c4::24) by CH8PR12MB9815.namprd12.prod.outlook.com (2603:10b6:610:277::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.6; Tue, 9 Dec 2025 12:57:09 +0000 Received: from SJ1PEPF0000231B.namprd03.prod.outlook.com (2603:10b6:a03:2c4:cafe::50) by SJ0PR13CA0079.outlook.office365.com (2603:10b6:a03:2c4::24) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:57:08 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by SJ1PEPF0000231B.mail.protection.outlook.com (10.167.242.232) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Tue, 9 Dec 2025 12:57:09 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:58 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:56:57 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:53 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Shay Drory Subject: [PATCH net 5/9] net/mlx5: Serialize firmware reset with devlink Date: Tue, 9 Dec 2025 14:56:13 +0200 Message-ID: <1765284977-1363052-6-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231B:EE_|CH8PR12MB9815:EE_ X-MS-Office365-Filtering-Correlation-Id: 23abec29-3e7b-4b50-8533-08de372276af X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?2aSCxTDvf+HxXqXMxz9/eCjFEchsvNF1QwE2XHzTZSgBfQ1Q85ai2eDdS1YL?= =?us-ascii?Q?MsX2H2yJAUIg6xQ0woqxkdaQAfZNf5RWkpjJQWG7Dq3+jDIGiETj1Awg8Mm9?= =?us-ascii?Q?uvKmL1vwriudBhgI1MsrI8ISveQOdtZszagl846CGBijK5/vLQWghVyuWJRd?= =?us-ascii?Q?VLcXC9v+wuTQIEkVh4JI8cpX+0gNdNYeG22gCqSEOCKt/AkiDydUvMbv4cco?= =?us-ascii?Q?0Mut5VrlPJrE21FMR3QzC3ZW1CWX8e6S9xwNxIWlojUUajED2Fu25xWkzZ1U?= =?us-ascii?Q?SOLJHODTwl6ItamuTfSW34jdMiXPw0r8SoHR/lMOibA4kIN/oznhephkTylJ?= =?us-ascii?Q?nwJSz3Sk4CHj/5Z7ZmE2qhSWFuDblRpC1cnk7BE2ntbyq5TqoddWmVAGIpzo?= =?us-ascii?Q?ovpE2spzcjpTgTPpnB1rP8JqwPpfASnf2II0G22L6TVJxZhA9471S7Te8PHs?= =?us-ascii?Q?qjricVKTLIJJ2FxRYrHHn9KaXT6SAYfX0hrP3n9TOhLkxn6rtGzH85SpzPHU?= =?us-ascii?Q?xlz4F74imwEcgPDsHpLyLXsaa0v7XdiHW/J9GX4aJRhnpUIuJvOwaap+qBam?= =?us-ascii?Q?KTeuzzftcDL1i009yfq/KZbh6jp5tYNJe6h68hGiEE1uYK/wR1DHy2YYUEvq?= =?us-ascii?Q?WRgBRaAgVCUtNB5k5O4o7t72aNpMCIowP3TXLxet2pVOMTWrieg/ARexpfrX?= =?us-ascii?Q?qk626Z1FyIpkWlkJpEQuccoIWTBkMw4/PHio+4AY62OucvAHHV2yYPwi6f3j?= =?us-ascii?Q?hxaXBN47WU9MmMghcSUm9DRh9+wg6RVSsXOt0Nt+StbKrMBGOz3rNZx68OYJ?= =?us-ascii?Q?7Qqs4WnKoVrZ7kuriEqRA3VjUFFVPT3AsRiyzp0nl+HxMgTxeNRsH+tDxp6T?= =?us-ascii?Q?wqa6KI9EMdsR1hXU55Em/k3OAudlhgCybv95Ea6eEDUL9tE6bkkwincn6/uj?= =?us-ascii?Q?CgMmq6vEUKkciV2XMi002ixnQ7Dvv03VSwk6sMe6SaIBXGU51okVSwxV/MHv?= =?us-ascii?Q?h7b0f6vAy20cA4CXxom3n3oGZj8QBU+dVeaNHNmdmLL9D7Fs1eyHCAi+5Ww+?= =?us-ascii?Q?NoubFXTcDL+bbl7p3thneGwjPBY9dEP3pNkke5B4mGQUB8DFVVMg1ANgB1DW?= =?us-ascii?Q?1hjrUpjf82AWyLMjBWCyKfm60rUzoKWtpiPganzp4+TLuX1m+8+RFEmDmaEa?= =?us-ascii?Q?q70d056fxiD9FGqnYTQ9w4BBNjBSPqfpJa3NRqiWLtHEeKQ1Y/q+qDa7uxa3?= =?us-ascii?Q?wSFiFNpseHx4RN0b/streKnw7F1bMrgkASgAD6RdGXk3IFpULDFtRC2HKCSA?= =?us-ascii?Q?LUJ5LneY2Kq6tKCgdFf7sZBYXS+8tpEeJ3ud+kRm3g1NgbalHNDbCZBvQ+Kx?= =?us-ascii?Q?syz8B9ySlCJ55YvgnLgfcrLOzLpN8rSbD3taDuLdVMMHNF3LYUfrCjbM59tA?= =?us-ascii?Q?6gHh/deWw68hAMaTU31NxrDddkq6XLggtioAHUzbLe2YsnrjYSDQA+Ym8K/B?= =?us-ascii?Q?lEJuxRLX2fdurTvN8VTeRO4ZNEUNTCVOMdd8B2UIPjrapILLyvKeh4r8kIAz?= =?us-ascii?Q?kpU0ku6ejf5HkbntVZddRnnVxzxHaae9UA0r+VFhY9yPodkC7omuP1nI96R2?= =?us-ascii?Q?ZA=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(376014)(82310400026)(1800799024)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:57:09.2639 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23abec29-3e7b-4b50-8533-08de372276af X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR12MB9815 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory The firmware reset mechanism can be triggered by asynchronous events, which may race with other devlink operations like devlink reload or devlink dev eswitch set, potentially leading to inconsistent states. This patch addresses the race by using the devl_lock to serialize the firmware reset against other devlink operations. When a reset is requested, the driver attempts to acquire the lock. If successful, it sets a flag to block devlink reload or eswitch changes, ACKs the reset to firmware and then releases the lock. If the lock is already held by another operation, the driver NACKs the firmware reset request, indicating that the reset cannot proceed. Firmware reset does not keep the devl_lock and instead uses an internal firmware reset bit. This is because firmware resets can be triggered by asynchronous events, and processed in different threads. It is illegal and unsafe to acquire a lock in one thread and attempt to release it in another, as lock ownership is intrinsically thread-specific. This change ensures that firmware resets and other devlink operations are mutually exclusive during the critical reset request phase, preventing race conditions. Fixes: 38b9f903f22b ("net/mlx5: Handle sync reset request event") Signed-off-by: Shay Drory Reviewed-by: Mateusz Berezecki Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/devlink.c | 5 +++ .../mellanox/mlx5/core/eswitch_offloads.c | 6 +++ .../ethernet/mellanox/mlx5/core/fw_reset.c | 45 +++++++++++++++++-- .../ethernet/mellanox/mlx5/core/fw_reset.h | 1 + 4 files changed, 53 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/devlink.c index 887adf4807d1..ea77fbd98396 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -197,6 +197,11 @@ static int mlx5_devlink_reload_down(struct devlink *de= vlink, bool netns_change, struct pci_dev *pdev =3D dev->pdev; int ret =3D 0; =20 + if (mlx5_fw_reset_in_progress(dev)) { + NL_SET_ERR_MSG_MOD(extack, "Can't reload during firmware reset"); + return -EBUSY; + } + if (mlx5_dev_is_lightweight(dev)) { if (action !=3D DEVLINK_RELOAD_ACTION_DRIVER_REINIT) return -EOPNOTSUPP; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/d= rivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index 8de6c7f6c294..ea94a727633f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -52,6 +52,7 @@ #include "devlink.h" #include "lag/lag.h" #include "en/tc/post_meter.h" +#include "fw_reset.h" =20 /* There are two match-all miss flows, one for unicast dst mac and * one for multicast. @@ -3991,6 +3992,11 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *de= vlink, u16 mode, if (IS_ERR(esw)) return PTR_ERR(esw); =20 + if (mlx5_fw_reset_in_progress(esw->dev)) { + NL_SET_ERR_MSG_MOD(extack, "Can't change eswitch mode during firmware re= set"); + return -EBUSY; + } + if (esw_mode_from_devlink(mode, &mlx5_mode)) return -EINVAL; =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/n= et/ethernet/mellanox/mlx5/core/fw_reset.c index b81de792c181..ae10665c53f3 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c @@ -15,6 +15,7 @@ enum { MLX5_FW_RESET_FLAGS_DROP_NEW_REQUESTS, MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED, MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, + MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, }; =20 struct mlx5_fw_reset { @@ -128,6 +129,16 @@ int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 = *reset_level, u8 *reset_ty return mlx5_reg_mfrl_query(dev, reset_level, reset_type, NULL, NULL); } =20 +bool mlx5_fw_reset_in_progress(struct mlx5_core_dev *dev) +{ + struct mlx5_fw_reset *fw_reset =3D dev->priv.fw_reset; + + if (!fw_reset) + return false; + + return test_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_f= lags); +} + static int mlx5_fw_reset_get_reset_method(struct mlx5_core_dev *dev, u8 *reset_method) { @@ -243,6 +254,8 @@ static void mlx5_fw_reset_complete_reload(struct mlx5_c= ore_dev *dev) BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE)); devl_unlock(devlink); } + + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); } =20 static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev) @@ -462,27 +475,48 @@ static void mlx5_sync_reset_request_event(struct work= _struct *work) struct mlx5_fw_reset *fw_reset =3D container_of(work, struct mlx5_fw_rese= t, reset_request_work); struct mlx5_core_dev *dev =3D fw_reset->dev; + bool nack_request =3D false; + struct devlink *devlink; int err; =20 err =3D mlx5_fw_reset_get_reset_method(dev, &fw_reset->reset_method); - if (err) + if (err) { + nack_request =3D true; mlx5_core_warn(dev, "Failed reading MFRL, err %d\n", err); + } else if (!mlx5_is_reset_now_capable(dev, fw_reset->reset_method) || + test_bit(MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST, + &fw_reset->reset_flags)) { + nack_request =3D true; + } =20 - if (err || test_bit(MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST, &fw_reset->re= set_flags) || - !mlx5_is_reset_now_capable(dev, fw_reset->reset_method)) { + devlink =3D priv_to_devlink(dev); + /* For external resets, try to acquire devl_lock. Skip if devlink reset is + * pending (lock already held) + */ + if (nack_request || + (!test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, + &fw_reset->reset_flags) && + !devl_trylock(devlink))) { err =3D mlx5_fw_reset_set_reset_sync_nack(dev); mlx5_core_warn(dev, "PCI Sync FW Update Reset Nack %s", err ? "Failed" : "Sent"); return; } + if (mlx5_sync_reset_set_reset_requested(dev)) - return; + goto unlock; + + set_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); =20 err =3D mlx5_fw_reset_set_reset_sync_ack(dev); if (err) mlx5_core_warn(dev, "PCI Sync FW Update Reset Ack Failed. Error code: %d= \n", err); else mlx5_core_warn(dev, "PCI Sync FW Update Reset Ack. Device reset is expec= ted.\n"); + +unlock: + if (!test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &fw_reset->reset_flags)) + devl_unlock(devlink); } =20 static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev, u16 dev_id) @@ -722,6 +756,8 @@ static void mlx5_sync_reset_abort_event(struct work_str= uct *work) =20 if (mlx5_sync_reset_clear_reset_requested(dev, true)) return; + + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); mlx5_core_warn(dev, "PCI Sync FW Update Reset Aborted.\n"); } =20 @@ -758,6 +794,7 @@ static void mlx5_sync_reset_timeout_work(struct work_st= ruct *work) =20 if (mlx5_sync_reset_clear_reset_requested(dev, true)) return; + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); mlx5_core_warn(dev, "PCI Sync FW Update Reset Timeout.\n"); } =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h b/drivers/n= et/ethernet/mellanox/mlx5/core/fw_reset.h index d5b28525c960..2d96b2adc1cd 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h @@ -10,6 +10,7 @@ int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *re= set_level, u8 *reset_ty int mlx5_fw_reset_set_reset_sync(struct mlx5_core_dev *dev, u8 reset_type_= sel, struct netlink_ext_ack *extack); int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev); +bool mlx5_fw_reset_in_progress(struct mlx5_core_dev *dev); =20 int mlx5_fw_reset_wait_reset_done(struct mlx5_core_dev *dev); void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked); --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from DM1PR04CU001.outbound.protection.outlook.com (mail-centralusazon11010036.outbound.protection.outlook.com [52.101.61.36]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6832C25F995; Tue, 9 Dec 2025 12:57:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.61.36 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285045; cv=fail; b=Tm7lS5UyN8sypnnP079FWqkAIP+P0WBa//vrcD55r7U/xx+nlQWDyM3LfsYJPjUbvjiJnVjtRtw4iq1xH35Q+53bDutuOQpYpgmCC2t56ZH1dZ3Mopz9lPjCaTJyHH+IbVrZ3QIflqstQ/hoWi6AHMu9+94FnnHK/se9nKjbVys= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285045; c=relaxed/simple; bh=/9fWrblUYmjC+U5FydVBJiEWbp5ncjQLQmhe7ArYdL8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GAw+B1eLq3YOh3ci4d3TtN5mpirp5gb6TBCX4UjzmMLLCyr29vtamHAPzKguxIqcNWlx5M6S0pdQRSUFNhCg1Y02CmprfMty+m1bgUpIC04ttoAcIC2ei1EmBvxBgG748B28FT53iVJ/Lty8WpB3VsQzUmA8pPGtVPrZpXmiE6M= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=OP5EiTOj; arc=fail smtp.client-ip=52.101.61.36 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="OP5EiTOj" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=IOC2IhnT0258DGvz3XB7kJQ7ypu0c+jN6KCofXR7YofOcZzMNbByEIPJ/Kkl/gFTfNiC0WiLSNJZ/aAAFrInFhw3r+X/lu4pmrP3hap8wNUvbXIwwjCLUOn85xrrikS8W/sljqKmJbDp8vaWDW2ghr0Vqa47AhexsAatDS862n/VXt2e4igbKL+D8VqhY8UIQt2t+nK3NZfANKT3WZc1sqeMqd2P60tIai5dEEhsEOGBvdhzl7L+nvPrTdN/u0+2epzBf3zq7B6NqeKY9UIos6/8XsrtkD7HJJEsdgHhn6J99ixpF4yvJr8Vt9UNSSObdqc0N+MjpB6IfgpiiEbonw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=sCbhkLfJCNweK9+GeOOmJ5z4lbRTfmrkb1gQryb9Aiw=; b=VSKWBok+m0drQyJpHXGql5qEKXP35mS5CTh1EMQwXVabU4jYgSqmnpHw8ypuvnjhdOoXJv4590A4UW/gmDgmG6jEPpYwdlu3JCX/pYIMXSkhjKg3eO4zmle+pcNcT/PgsJXlYIrDSphDm6zKdPvQeaBIVvZcHCFCczNIkE0TzCn4ixAvo+v/Gth7vGfK3qTVX8rZp3Lr/j2I5I/NeoorysA+ximU3yK6ZseVM6wOut/A8GcQx1zbnHAwaCBHfKVOXBHuN4shtapmxHU40MHO2gRL0PWxeODG4cPBFEfHx2IWS5k7102sc/f6oCjV77sMnsJvljZc8VUwitgivumjbA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sCbhkLfJCNweK9+GeOOmJ5z4lbRTfmrkb1gQryb9Aiw=; b=OP5EiTOjxBHmeqA3NQPM4sXse9gPddLaDWEsJ0VqYNktSlT5h0ACklgBR6FLQsSoMCJdHF3IC1PxAqVIcE/1eLH5ftqfjbjjdWNA9zsIyrvLpz/rMh3G4u20USJHIs6KFr2ly8LpNz5wIORYIkLSSdSJjinIxeXMrbX3rmadAse9wzyI3h++ag+aR52TH7v4Yp7O3xvde3ZmEwaEDcRTktPUBt5RnsGcXwXxIlh/emFGf8clK5kDBlBSMgd4aO8CUGCtUnMryXocGsaR325Zpf7GN+nVbmznfCmiGQ1SI+mTSBJz4p71m4Yl7o2Nny8yCUg0V9QAArkfLjwWMkXIOg== Received: from BL0PR0102CA0033.prod.exchangelabs.com (2603:10b6:207:18::46) by CH3PR12MB8533.namprd12.prod.outlook.com (2603:10b6:610:159::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.7; Tue, 9 Dec 2025 12:57:13 +0000 Received: from BL02EPF0001A105.namprd05.prod.outlook.com (2603:10b6:207:18:cafe::d6) by BL0PR0102CA0033.outlook.office365.com (2603:10b6:207:18::46) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:56:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BL02EPF0001A105.mail.protection.outlook.com (10.167.241.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Tue, 9 Dec 2025 12:57:12 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:03 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:02 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:56:58 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Jianbo Liu Subject: [PATCH net 6/9] net/mlx5e: Use ip6_dst_lookup instead of ipv6_dst_lookup_flow for MAC init Date: Tue, 9 Dec 2025 14:56:14 +0200 Message-ID: <1765284977-1363052-7-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A105:EE_|CH3PR12MB8533:EE_ X-MS-Office365-Filtering-Correlation-Id: d51042fb-c6e2-4b48-aee3-08de372278ef X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|1800799024|36860700013|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?s5fXBnaCB+sWkwbMXRKPNPnF78Fcn7d2datGO6kLiSQHIaV+/5hHc51hbuu6?= =?us-ascii?Q?QSBGlfrPstdcEdc3jGRcZshBHJOjvds/BOSW2DFtyyNXmzhNzlSIwTGMqIMz?= =?us-ascii?Q?x/TS6SgFjJKrixJk1BgTYnRoMiBXYuZDPzjfLRcIsmj16X66vCCqGOJSnxD5?= =?us-ascii?Q?53OEfXTHY7Oh6QiCEN7tCI4rrts3+0xtFeBI7vWiFh1Gz6ktkiqc25lB9Uzb?= =?us-ascii?Q?8mu5S/B43qVaoENUg7TAUx/Ok72t9MRN4GRMwC5CuQRChOlsCBW7M5IT4pTt?= =?us-ascii?Q?UsI3A2D5ckM8oB7MeVppIC9rd83NrY+mikli7MbWBPp9RbKscCxVvdgkVroG?= =?us-ascii?Q?TaEmdJ+WZKbyZVntK+ZcZnLloSZrQ66HNLEhac4NRVFax/PY5OYC05eba7wd?= =?us-ascii?Q?Cfa+XRP1Yx1s370vQBPpKw7Cnqygr7Lir3ru7+8Nj84JY6IhGCcEOr5yvsy7?= =?us-ascii?Q?tSdM7E/2Nb0NSJNmr0G6SXFpEElu7cAPwe3CmLdEeJxQMupt89IMxh8w/JmN?= =?us-ascii?Q?V6kp6AREj7H4DB3t8sr2uL5PXY/GgAE+r+wszTYrOzIuK2XgPlKiXo0DmUDQ?= =?us-ascii?Q?zTFHZqBJvDPdjE0VATgQj9RKwe2YS8gF+KIfyxQzQNv/+VAH0LE4+MHRcI3I?= =?us-ascii?Q?99fDyKg185Z64JhoVQ5Cv2dVVFQN58tbvr+bD059mPQVlsmW0QqnxXbbsONv?= =?us-ascii?Q?y4xqWHQltpatPVJHsWU+zQ27grtCFC+qZwjra+t4V7fb/UqrnaAkpVEYm3zQ?= =?us-ascii?Q?pL9CsJF6FSDk+r/G5hhdPsUzngFp+ZSJG7dQ2wsJ5jAseiLwwPVJiK5oSIzn?= =?us-ascii?Q?RhNI36LqKOV6PPqYwaz3nsdPLxlxYQDGgI7wknwANiNAjGyY5Liw/87dKvXD?= =?us-ascii?Q?HQbjDPiFfcEaCufoF7RVSN6vtuKKE6Y7TtXxlMdCSBw67ojDfzPEwPWaWXxp?= =?us-ascii?Q?KWBnT7w4ZAU1hlkrtyyV+lohG1Ht/FPpWyB5+2lpPnSzaAdwRW+3Q5O15qh2?= =?us-ascii?Q?zZ3nft28aa+RKprX0JGYByIyKwBPMD4C+Hxgdlm1r4aZX0QwXO3JBkjS6ibe?= =?us-ascii?Q?R2/0i2UgeXoJvEeIxW7mgkelrHszLfssL3rk3iAYu+aDfJ2siXWyrQni2TWL?= =?us-ascii?Q?klmeKYE08VuCe0KRVRWzu9u9FZB8gY8Dp6iHjCWCcVFwXKe9GLBZk9xXdARb?= =?us-ascii?Q?oP/jowWy2wbdAC4a7D9Dm7lRBZzbI0BQo3laYxAwglaw7lBP0ooxiRh+pT4Q?= =?us-ascii?Q?KSoHcYiOL8985vNMbiE2SqfavykeBL2ylIlbuNtLpYvBjp8xWcHC6Wr9LaSu?= =?us-ascii?Q?JPJBWvgh2tgm9bGfmh0Ln4iJxf0QTh5F1k9bpNxYZ7Szw/0sj18wAkuwO+Dp?= =?us-ascii?Q?0ANYvnVcp1ht/WdySqL53AAd2p2Vn4WOd/h8GKwnUkXys9HJSgNdleRQJIK4?= =?us-ascii?Q?Im+QCAwHfInMX1zk7FE9IiGClfb8xVcDThcKLWER81ok5oyWQTKodpRaflMn?= =?us-ascii?Q?5k0ifFQKpor1V5GyRgSBdVqJkXLdxLDNdRoivSUF9/LIDGUpkIinMHtOCNGb?= =?us-ascii?Q?jX88OsQ6krp7c7sFGV+pAT9F4uRvPWjk7uAF/sSz?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(1800799024)(36860700013)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:57:12.8920 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d51042fb-c6e2-4b48-aee3-08de372278ef X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A105.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8533 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jianbo Liu Replace ipv6_stub->ipv6_dst_lookup_flow() with ip6_dst_lookup() in mlx5e_ipsec_init_macs() since IPsec transformations are not needed during Security Association setup - only basic routing information is required for nexthop MAC address resolution. This resolves an issue where XfrmOutNoStates error counter would be incremented when xfrm policy is configured before xfrm state, as the IPsec-aware routing function would attempt policy checks during SA initialization. Fixes: 71670f766b8f ("net/mlx5e: Support routed networks during IPsec MACs = initialization") Signed-off-by: Jianbo Liu Reviewed-by: Leon Romanovsky Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/dri= vers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c index 35d9530037a6..6c79b9cea2ef 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c @@ -342,9 +342,8 @@ static void mlx5e_ipsec_init_macs(struct mlx5e_ipsec_sa= _entry *sa_entry, rt_dst_entry =3D &rt->dst; break; case AF_INET6: - rt_dst_entry =3D ipv6_stub->ipv6_dst_lookup_flow( - dev_net(netdev), NULL, &fl6, NULL); - if (IS_ERR(rt_dst_entry)) + if (!IS_ENABLED(CONFIG_IPV6) || + ip6_dst_lookup(dev_net(netdev), NULL, &rt_dst_entry, &fl6)) goto neigh; break; default: --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012069.outbound.protection.outlook.com [40.93.195.69]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8F66322B6D; Tue, 9 Dec 2025 12:57:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.195.69 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285047; cv=fail; b=FXVhxqeG5KQPJ2zjqrCK5CXRLnwg1S77QDa3uGeEMvSufeMnjg+kwxVYeMSXtE3Z7i64z2VzwYFrnSq7Umd0gz8SldIKG2LQRGxL5txZn+7Z4s6oWN/9JDmwiykGmFvTcNkT5RMadQu3fLpp0mwBu3Cw5kPUw7aVFi4cHvvEEmo= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285047; c=relaxed/simple; bh=5HEjhxHDdcofq+gLo2QW2WxsEepBY6OpTI/WB4fBDAM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PFGdXK5GjDq2ztIjR8FA9YSGzAzGceFh3E9yPYbPYTcXOADi0SfVvUh3xVM0WYi+Rv4TeL1Fd7npemCWBJ/73vkYtJHVaJhA1EoIkUzzAUinUbvYBFK9zONcOzWO3TfbZ8D/ZySP9W6JvUOD2dMjPgHRa6xxYVbMhlzsSNpFd0g= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=LjBKYdMA; arc=fail smtp.client-ip=40.93.195.69 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="LjBKYdMA" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ycI/aHk2hfb9poR3rdZeGSts6IEbRJ743DAVLYH/XOGWbdWdwa2/NlguIFshas+Q0NaH4xaLdUMljVcej1kKyGcm6Ir4se56QobabVkmzOkta/hatMa/n7/3Hymw9os1J8cMdNV1Ae9VUt0C+IgK7+9vcb9uEzsOSbfKZPGKgQi0ZJ6kaVmMBpTUXQGHEBZ0zFC/GLBF1ou/nFebaChFunPadvGdkgo6DPJwVnwqGnd2EophTqvpTBGfHaPg2Xr8iQvxpatTDh20ajzkYS2LEORj9O2XcP/sl0pTYVKsAvJVBexWMjP5wS/sJPTK7J2gqYcnp3AXj9B6+cXGMQUkLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PQfMJ0Fh36XPJsRjg257B/afW81IQKTp0Qm861bHvMM=; b=No3huxRScASCtJb5iU7jkyGgMml8U9x8VIW0R50gNYeGtvZ7ZpKK3dH45mAC6gBZtnuzdRb//JIOHycuwMX267gdqfzeM8rDWMR9ewO57OBKsUomT/Dc87yKira4IdRjjQglf+rXNX2gbiY3Dpclbc8EqdoWa7oe+zU4V2iEXqWMmOkayUkuATds9J0iz9xhoUl8VwsG68YUfACVhp2dM+H94/51PeDqVk0hidFR/WIuUIG39D122bBUBMFzX7OyjaIqPgwNQsg3VecdfCVWrV8JWpbLTcWQOVIKaXFVKErat9/I+1LD5oP7aBc1UAvJMTXooppkInVcVoHoxRxLTw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PQfMJ0Fh36XPJsRjg257B/afW81IQKTp0Qm861bHvMM=; b=LjBKYdMAvJkzUDyvFELWylaBwla6NkUZUFj7a3ChO2pbEPTcYIq05QU83orBzj/OkciIzdTCVxsw2hTxfv6wQf3JeiE28qILyzaEuIoMCLnRryC1V1/O6To1u5eHmGIrye+9CLLQTWMbA0i+08JkleMfm8fvaNg42PVMjZdNcgAlpB+Ng6F+Cn33an3zQpSFbBmmNXJ9ATZYm8S3GxoOF6kcGSA1ZqBK5AMruvC0USgHNIxEk2OHtlSi/X+7RQdzOSJy4YzYYTTg5beoaHcXIyfdunjhy5aGIJLSKE3T/fAT6nTAbo+QhOe84T15lRHOn6VtcLvdJ83jV+EzGjA0Zg== Received: from BY5PR03CA0021.namprd03.prod.outlook.com (2603:10b6:a03:1e0::31) by LV5PR12MB9778.namprd12.prod.outlook.com (2603:10b6:408:300::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.6; Tue, 9 Dec 2025 12:57:16 +0000 Received: from CO1PEPF000042AB.namprd03.prod.outlook.com (2603:10b6:a03:1e0:cafe::94) by BY5PR03CA0021.outlook.office365.com (2603:10b6:a03:1e0::31) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.14 via Frontend Transport; Tue, 9 Dec 2025 12:57:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CO1PEPF000042AB.mail.protection.outlook.com (10.167.243.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Tue, 9 Dec 2025 12:57:16 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:07 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:07 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:57:03 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Jianbo Liu Subject: [PATCH net 7/9] net/mlx5e: Trigger neighbor resolution for unresolved destinations Date: Tue, 9 Dec 2025 14:56:15 +0200 Message-ID: <1765284977-1363052-8-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AB:EE_|LV5PR12MB9778:EE_ X-MS-Office365-Filtering-Correlation-Id: 469564b7-7e8d-4cdd-b9ea-08de37227ae4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|82310400026|376014|1800799024|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?nIot/NhXMAiIpA6VZeu6MOBSzl8jKOdPH8KKJKC7mOh7r8FDX6eI1d1DH8yJ?= =?us-ascii?Q?H1gL2sDLv0QbjXl4FJfcIafYFeQ0oee21VZY/SoIokR+3yNDgo1eGlXxdkQS?= =?us-ascii?Q?9sHlf8T8ZnlfJA6L6t8b75Rz7cFix+Wf0QF7uPHFVJtQQ94uiFVgsGl1ZFxc?= =?us-ascii?Q?WXwhOkuCX6ZrqIbnX1GIascKUp0IO/akVP6ZBxVtxPbU4bA2TBwkQD/9KfEM?= =?us-ascii?Q?JnAexWZ3Pz5bpFmUva8J26T9k0NqHHdYbvsiIL1Tq/SR9DJ8NXGbWvfpVGnK?= =?us-ascii?Q?t1E6LOj6VOZQ13B9EPfaATcpiTTP6MDpaIDmVb17FAb+Dx1nyPqZmSpw2HoA?= =?us-ascii?Q?y/esGG4Cclaggxe6PFYxEKj2HSbUI1II/U/YDGdxu4lCUkw2ZJKvdrpYGcf/?= =?us-ascii?Q?OahioTnXPO5f4qUQBegp1yBvMIhZvHL+5OLqibulP5FCE7X079xGuGEXYy3P?= =?us-ascii?Q?9qjP5x2+urcBvMN7Z1oVoPRxoKQntfunopn7kkxd49jHtw4hsD4+arRc7fP1?= =?us-ascii?Q?K4Ttlp87UvuIIfrAz2Dkpvx8QC8VApwEf2ADKKUI1mFhgu5uGV3TUwic+pUa?= =?us-ascii?Q?b+Y2LP7S8qXBxnyKeIcuCzAyCh+OycGbrQhNe+nM16rH5jTG97ZxZzhVEZAL?= =?us-ascii?Q?biddamV/lxTKEfe8VKc6BT4gzu/QmubJ2qGyB7pXlbNXHmxMxw+3AyXFC48r?= =?us-ascii?Q?v0OWxwoz54lEBFIKFldN6nZCzrYh2x/OEq5+oF/kJouREx7OrbEHrvOE7PnX?= =?us-ascii?Q?D/zAfDAdA7kF2S6HEh7DZrZ8UmfBvOHqzMIAeh9rvNjNlR4AncZ22H4CH4SH?= =?us-ascii?Q?tsw8cnI0ot8Pzst8RVCzxRQ9sAdM60uV8gJZfmnDZOwIu1umN2bN+PdNi3pA?= =?us-ascii?Q?fYETjiUOtImQ5WVjpbx9AOzAeBre72bY5G+p/MIBK+cnUzMWKWtLaH7YJRFv?= =?us-ascii?Q?lC7Oyr8nxrmDxrhocR3L8BQW0aHqDhShvUM1oE5/UQNTUfVMQxRMUxiNiRnp?= =?us-ascii?Q?lIjEY2b7Y/wgC8eF2Zd/TUKM9oJdPSyWwfzh20asG1vQnBUgRLUfvFj6BW2C?= =?us-ascii?Q?R4aQmh+fJftoYowUY2GlzIkRjxrqu+Kr6Wgc69Wk51gDPjqNYZRsTjM9VAkE?= =?us-ascii?Q?tmJYom7+x+IQl/ed/BeO3BZLTAb2DP3aB1QtHRRHE1Dwl32JJUX0y8TxXXrb?= =?us-ascii?Q?vvOS1gidhNo8AgCPWOCKAStTCK/VXB7xIPmmK60G98FIAv/rrrriTr09hT8t?= =?us-ascii?Q?0vrpW81ctHC1ap+3/JgNMqtZMhCBz0nxJ+A85tBCechEA2t2PxSYLohYw21a?= =?us-ascii?Q?kCvTTwsD2kcNmg3TfzBN+mCUzycU6KpiL8DBKxicHoy6a+El3Nj379YG2Y5J?= =?us-ascii?Q?UDNtWXmhBq6TLdVc0PDQY7UoDjVe7sB1stReKh/ZK4NqDgVWIst7DFQmLgce?= =?us-ascii?Q?LJOg40bvfMCHqFlm5D+iaamuWcQJn+8xg83gQQPa159APuyPlY0Ww8JefSxu?= =?us-ascii?Q?2UNloDVcK4c24a59LLyimYixsRZCpIeKTL5bFfVBjJai2/Og0sJUkKf1a4ti?= =?us-ascii?Q?lRxZ7xvXh+hUwa/LzVUKPsNn0Hj6+gFj2Q31k+3K?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(82310400026)(376014)(1800799024)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:57:16.2564 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 469564b7-7e8d-4cdd-b9ea-08de37227ae4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV5PR12MB9778 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jianbo Liu When initializing the MAC addresses for an outbound IPsec packet offload rule in mlx5e_ipsec_init_macs, the call to dst_neigh_lookup is used to find the next-hop neighbor (typically the gateway in tunnel mode). This call might create a new neighbor entry if one doesn't already exist. This newly created entry starts in the INCOMPLETE state, as the kernel hasn't yet sent an ARP or NDISC probe to resolve the MAC address. In this case, neigh_ha_snapshot will correctly return an all-zero MAC address. IPsec packet offload requires the actual next-hop MAC address to program the rule correctly. If the neighbor state is INCOMPLETE when the rule is created, the hardware rule is programmed with an all-zero destination MAC address. Packets sent using this rule will be subsequently dropped by the receiving network infrastructure or host. This patch adds a check specifically for the outbound offload path. If neigh_ha_snapshot returns an all-zero MAC address, it proactively calls neigh_event_send(n, NULL). This ensures the kernel immediately sends the initial ARP or NDISC probe if one isn't already pending, accelerating the resolution process. This helps prevent the hardware rule from being programmed with an invalid MAC address and avoids packet drops due to unresolved neighbors. Fixes: 71670f766b8f ("net/mlx5e: Support routed networks during IPsec MACs = initialization") Signed-off-by: Jianbo Liu Reviewed-by: Leon Romanovsky Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/dri= vers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c index 6c79b9cea2ef..a8fb4bec369c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c @@ -358,6 +358,9 @@ static void mlx5e_ipsec_init_macs(struct mlx5e_ipsec_sa= _entry *sa_entry, =20 neigh_ha_snapshot(addr, n, netdev); ether_addr_copy(dst, addr); + if (attrs->dir =3D=3D XFRM_DEV_OFFLOAD_OUT && + is_zero_ether_addr(addr)) + neigh_event_send(n, NULL); dst_release(rt_dst_entry); neigh_release(n); return; --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from CH5PR02CU005.outbound.protection.outlook.com (mail-northcentralusazon11012014.outbound.protection.outlook.com [40.107.200.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B49632AAC1; Tue, 9 Dec 2025 12:57:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.200.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285050; cv=fail; b=GtGBmfMlMzupdCJl6CigP63RuT9auOsg9VJhHW7Ybv/q4q9bStLVN0d7LvjfTA6OFMCPuaXa+m/IZP0wvWV4SJ724X8h6eQLjqkh0WCFF5tCOZTuFJeOM/WbkG3oyu7InjQkfDCnV57ip0RSyO7iRhYRqvgn6mBsNb4oBxgtt00= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285050; c=relaxed/simple; bh=yIW56Un1EzOAPPzV8gNqyiAYnPLbwxd6Rm7gfk2nhKA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NjzvFUu/nQe1DvgnFTTpprpbANpeeRbPHFuiDVLMhZfvN7B2sEKVkuaABoHISX3X8wigOzRRmjVuAq+6kci4OuPhJO7XMXKx8vdnZoXSqDDxgpLAwY2uEy5EQHTlu4NlpGLZZREw/Swq0RpdLGXYNWoFjkp0GK7vG+uiSzqb6SU= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=UFtRgWkH; arc=fail smtp.client-ip=40.107.200.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="UFtRgWkH" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=CqU3h5esez6094m2kNMuPDxIGGNd8U/EUX5n9VP2Ef6WNwVaaR7Bs/GEtRYdx9/FmzSB64bdm9Pz9ryI3k+ney8/AwcIpY9IOITu6rJHGs7+vjGCa1wXZmxwnZ8/Spzna9g2VetA5mPpuIyT2mux5jMiaO7YAS4fPXtA8g4W58BFfsM9d/H1kAELOG2GB4r3NJx8+gLOPD4wdKS1fNkKH9VzPCdNyfhvhastCz0yIo9JcQmta76xC5nVg8nC6VES6s7j5ejB1QF6AhP1ExME6TkIBhBHxcIBXGGnqySDxXdipnjrNyKClYdXWMromYMsLisb1WGmCR/peCAgOBmePQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=h+HV8ITuOvFoPkSm2TlLBjlNUCC1JCFZs+BJijytKNs=; b=v1R6F/bo/ea9etWqfGjISNpGaEUZ0Q85VL8aMsvbSEvGtRXaDrtUpee19sUCii+kAHFqwDZcFFsTFgEewkMWhCLNQ/2qvgDr7v8Jc+VDeUSyo+WkgSBNbDLEy3Deu66KSZ/CZ2wZ4RBQVWtDLvJErasnFF3A3MkKBLAWDkhw5Wysr6uzeh3M72w0j5NaUxbXLnQjLwLwaHvxywRRCEo55PxnQaz7c17i0hLjtVYKhbQ9n2MuskEHqYh5IfP/msnn7U7wMvzpfWzelwajjRxEXhO117u1wyf6Ruo8FZPk3dHrA5Q+x3EmAXAyAMfSP2U1Dg9agX9bDg+S7+qu4P06lw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=h+HV8ITuOvFoPkSm2TlLBjlNUCC1JCFZs+BJijytKNs=; b=UFtRgWkHDvdtFAPGnTJfloxEhNOhwwN3ITF7TnZullSNqk3lA3Z/e5aV5pfe77xFC5hN7ThUVkgQr4YgHMvj9QgbdbvxL1l2M2taCrx/hGFPAfxjvfK1FRoujAy/dTScDfHqrzgYKp3i5ojv41fsZ4LOPPive7PBbcSmq2CP149EWu7O3LF5n6KeAtBkY1NiVfMvgcMoNZnHwiOcLR1X+itlm4pry2gOKG5PI8DRcL7d60k7lm9O95gxvlmCnZ9PSys4shFWQce/9aIEFJK9IyJ0WEToB8WgdBeYtQiYRbJEZ/VqWbpuJoFyRBtJm9tCNgNb+9Bl/4JJFbmPcJUBUw== Received: from BL0PR0102CA0015.prod.exchangelabs.com (2603:10b6:207:18::28) by DS0PR12MB7825.namprd12.prod.outlook.com (2603:10b6:8:14d::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.12; Tue, 9 Dec 2025 12:57:20 +0000 Received: from BL02EPF0001A105.namprd05.prod.outlook.com (2603:10b6:207:18:cafe::17) by BL0PR0102CA0015.outlook.office365.com (2603:10b6:207:18::28) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:54:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BL02EPF0001A105.mail.protection.outlook.com (10.167.241.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Tue, 9 Dec 2025 12:57:20 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:12 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:11 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:57:07 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , William Tu Subject: [PATCH net 8/9] net/mlx5e: Do not update BQL of old txqs during channel reconfiguration Date: Tue, 9 Dec 2025 14:56:16 +0200 Message-ID: <1765284977-1363052-9-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A105:EE_|DS0PR12MB7825:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f0e3981-ef96-43fc-55c6-08de37227d54 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|82310400026|36860700013|376014|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ApxRs75NSbasNNmvT2wsXoZugCaROq4O5SP6Ma1jPesTAUsqsxmK82TdZg0S?= =?us-ascii?Q?PvONa1FXcrVENIv/NaWmMrdXnFKdSgmRVGSj2ZJFkModuGdI9U5B4t2lG7N9?= =?us-ascii?Q?LGonOzanMD/NUpZoHRE9kGT/98IgjPGmqE4ZMJkfGRE6waj7NO2vreYbNHbE?= =?us-ascii?Q?g84VtQd0WjthuecOmDeyoOdigou8HvFQEmdISb2+LAZncOIyaq9KG4h3h0mG?= =?us-ascii?Q?F1aUaQAZZJMj3VE2mLCreAtyxymCYazcm2g4jhMKA/M0+1lxBTFAQWBengy8?= =?us-ascii?Q?Lj67g23ue81cMJJT4cvrpN5ZHuvLbG1YIoWrcCTR8NkT9SESA/dOmgyB+nLW?= =?us-ascii?Q?/rAH3TOsaq1QoKfxulkWXYaUD916YduH+/qC2UxEjlqAfKhxnV6WklH6ERUt?= =?us-ascii?Q?Og4X3TF4FosBDMbC93pwGawl2/5uZkUeV/T7+3cVJWVb84/5SQhOGYuBnEl/?= =?us-ascii?Q?fQXFRSNUzE1JRb4KK/66cPXTdZX/bbNpIxM0I//n2ve6goGkeiZ2Qn738qgH?= =?us-ascii?Q?9kX25MWnigwFcyuAnNICSfTjRUgTjprz4UkX+CgSEkMgyONMyIIMuTd4I2CT?= =?us-ascii?Q?W1EUFoEUmLccTQ2xGwTAkmkOBlNz6IV96VxYsLjbGUWFnwkUb7vC87GoqtNa?= =?us-ascii?Q?4W83iEHPkF9yFVThKKYoCZ8ArEO/IWciKZVkkf1Doy/YUzHbft1AJt/NOnC0?= =?us-ascii?Q?V5HAuBchSyyCIrW8taBiZ5QakigTJUepc4/T/p/AIQNa3OrMzv6KFNfiQdty?= =?us-ascii?Q?nC0mMwAFXX1mF4Kv9Esbf7AerqoBlbcghQ/Az9tE4wgGuEDnkRZgE01yntvE?= =?us-ascii?Q?tdQUmhtMXzHiRvKQQj/IDm5Jy0fvHP/QwQmCx739fhYThaO7w8KCSr9VAGs8?= =?us-ascii?Q?nnFGdIWPY7FbUtpasZIz5xEkOy0h1m3Fp9wsfFaFBWsZ3YnjLrJqqirPppKk?= =?us-ascii?Q?L38dAycQ+xDd5k6k87bRK8E6LZQ4LXzoYidHVz2g8jSEX1iw/9bZ89FlrKpB?= =?us-ascii?Q?HnCFn/NhO7Oh4nUYz6gMc9IgTksT8wD7PHkIektCrGu1SIoytzSuucyg2f//?= =?us-ascii?Q?SImr8TH6R+qJc/1xQ11TkXJVDyvgwzMWgmkZ8bCoSPgpvXuztfnnBkEXOsAK?= =?us-ascii?Q?yIOnahEiUSpFgCFX1tCghTCA5FuJnah3re6WqUjS2ifDrJi2PPzM8ihzugiY?= =?us-ascii?Q?3DtulaCvRbkF0GXEPRfPDoTJgOt/t6nX8CNEuZ086BFfgoClaJTftsmJQlol?= =?us-ascii?Q?jfz9xvzIk95kDG4kbbrMHsmeqGiKBFs4lHY214E5FeeFc0i+HXj3Av1nMaP6?= =?us-ascii?Q?B0SFXW2b6toRZU/6QO6GHWYKdHTdiKaZA2V8wI05xZXpGOgw3L00CDuW67VP?= =?us-ascii?Q?dFRk2TRThf6yRgbR1dj8EFC3WCOckWj+d3pfaTNCZwGZoXIBqEqtjB+hUneE?= =?us-ascii?Q?6tq4CEqdXo6fRhBXJ4HwGQBw9YgRj27nroLylMilnV964HM9tDXRl83MFk7P?= =?us-ascii?Q?1xZqvYxUmFyw8wsNfiEFhPfxlSBUUJMdRKV+r8NpWo/6q0NN2b64vay2J0Xy?= =?us-ascii?Q?JwygKdl+xtLzkIoj2vJJMnit96gE1JIvBe0yTzSG?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(1800799024)(82310400026)(36860700013)(376014)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:57:20.2594 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f0e3981-ef96-43fc-55c6-08de37227d54 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A105.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7825 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" During channel reconfiguration (e.g., ethtool private flags changes), the driver can trigger a kernel BUG_ON in dql_completed() with the error "kernel BUG at lib/dynamic_queue_limits.c:99". The issue occurs in the following sequence: During mlx5e_safe_switch_params(), old channels are deactivated via mlx5e_deactivate_txqsq(). New channels are created and activated, taking ownership of the netdev_queues and their BQL state. When old channels are closed via mlx5e_close_txqsq(), there may be pending TX descriptors (sq->cc !=3D sq->pc) that were in-flight during the deactivation. mlx5e_free_txqsq_descs() frees these pending descriptors and attempts to complete them via netdev_tx_completed_queue(). However, the BQL state (dql->num_queued and dql->num_completed) have been reset in mlx5e_activate_txqsq and belong to the new queue owner, leading to dql->num_queued - dql->num_completed < nbytes. This triggers BUG_ON(count > num_queued - num_completed) in dql_completed(). Fixes: 3b88a535a8e1 ("net/mlx5e: Defer channels closure to reduce interface= down time") Signed-off-by: Tariq Toukan Signed-off-by: William Tu Reviewed-by: Dragos Tatulea --- drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c b/drivers/net/= ethernet/mellanox/mlx5/core/en_tx.c index 14884b9ea7f3..a01ee656a1e7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c @@ -939,7 +939,11 @@ void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq) sq->dma_fifo_cc =3D dma_fifo_cc; sq->cc =3D sqcc; =20 - netdev_tx_completed_queue(sq->txq, npkts, nbytes); + /* Do not update BQL for TXQs that got replaced by new active ones, as + * netdev_tx_reset_queue() is called for them in mlx5e_activate_txqsq(). + */ + if (sq =3D=3D sq->priv->txq2sq[sq->txq_ix]) + netdev_tx_completed_queue(sq->txq, npkts, nbytes); } =20 #ifdef CONFIG_MLX5_CORE_IPOIB --=20 2.31.1 From nobody Fri Dec 19 10:00:15 2025 Received: from MW6PR02CU001.outbound.protection.outlook.com (mail-westus2azon11012066.outbound.protection.outlook.com [52.101.48.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E06E329C4E; Tue, 9 Dec 2025 12:57:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.48.66 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285056; cv=fail; b=n0omkfU/xdMvclewXWIJ1aUaM41AtrSos+8TgVxXQy8f+CM2iOU9NMaXLOmL+4FwamO0t/+jTBJfahHWVO5HWn0hGGkaPDw+r9t6T062aO03ThJFD++1aCF/Cp+AyuQ0osHbmRoPN5p9U+uLEZjXaDDVzjFOFgyojxBxFZW3OQk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765285056; c=relaxed/simple; bh=lI9F3Rfu4hWJknzEBZpzDHGxRPEds2H90p5wgdooAn4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KVWVuT6LaFk3S0U0nw/3Dm+1/9dSwzEdkUhn7WssqpYWSB7mDbqoCDZ+gR4GeB2oLIDWeO2iqQmNZnQjvgPv6xVdZaOq5hM67faCuyFdmX70Qm8a/t7kboR4Dvw0P7AxRSw4+Y9OsdBZCYnY3AvihkzINZDs6DZXB11Y54Oo6nQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=OR4bMKf4; arc=fail smtp.client-ip=52.101.48.66 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="OR4bMKf4" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=q0c4wMJmnOdazfIYbXHhCVeI+4jOKEkabG1h7OEjfqQiY98dlDME2iXtoatA3+F56FB+o5u8qN6/j6KpudE5dboF5AIxvGK7LYp1LjECcVvu2rF1EO8+VzC44xndSzFab/W5RGRG2AOLhHTrle4PbDc7ajg/bwYk6sezPqlj08Kj+kMsVXguHFNM17eSRkdoYG+b0yJlO3nT1A0qhu+aMaq8gTjBeRKixnrU2vAr33Ba8oCH4bGWc7iC1bNli7ZGwTuxZ26QKMtLrp8y1/Hq6fBzs/QOGz4P7iaVBZdsGrELm13/tgH2GLI/Gf8lIqScBxD+tD8haGcug5s+FXJH2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=kBw4OpwAFZRiUBOpIW0TrzZ83t3iXk7Fjd7At/b3HsU=; b=wcKB58E4O8abE9BWsdreJcF68dhc1T6MuRohzD3FSFzRcVH4LeaLPSfSPFF0Rd5CeF2ULeH3hu/ghCaOmm4zg2vfANyOlp6+fe+7lrpNePlC40jjjqm9U76zAvBM6TRqr1k6sLo4s3rIqAhMu1LaAQeW6JejCIaF/a4vcdWeWKh7s2RhUYK8WOkHoKC29QD7zC/ZGmo5LyjwAAlPHuUoFGPRMhy2rWJ+04XvwkGZ2UN8cg9U+zSUrv1ScM5bn0xlVJGun4XJVFFyaqNCRzOunsYSp96m+N7XOMRrQ86W2taMgkACeGN8PH9VFFzdaxvMeNQqgkt+XpXfqeOpLU8EaA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=kBw4OpwAFZRiUBOpIW0TrzZ83t3iXk7Fjd7At/b3HsU=; b=OR4bMKf4WcWReNQ6lSPMJTZEhawiJZzgvlimZDnOuhUn14l8/2m53GG0x1V02/9LpOm2k6spm9jfLlNdThHJ/zTpElpf7n+mMBhhNl6a8kGEKlMWFC6ij6cQuouCv/aInsi1yQJftv9dSJP7MJoN93iit0sx+Z6fdI8xw4VwB7P2a28j89smIHaD5VCPGCHuL8gfcbzLF59P0/XdXv03zNg4nZtBf6y6ZTZN5ovPxtU5um69LXYfK8+Gp3WIPfh97VNXsyYpuvGEXxtgmIv/bnfQAfEvD6hkbs83Xk0/nkfT5X3H2a3e7G0A2my0k/539P7CSSFmkcInBySw15h3tg== Received: from BN0PR02CA0053.namprd02.prod.outlook.com (2603:10b6:408:e5::28) by DM4PR12MB6373.namprd12.prod.outlook.com (2603:10b6:8:a4::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.6; Tue, 9 Dec 2025 12:57:28 +0000 Received: from BL02EPF0001A101.namprd05.prod.outlook.com (2603:10b6:408:e5:cafe::42) by BN0PR02CA0053.outlook.office365.com (2603:10b6:408:e5::28) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.6 via Frontend Transport; Tue, 9 Dec 2025 12:57:26 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BL02EPF0001A101.mail.protection.outlook.com (10.167.241.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Tue, 9 Dec 2025 12:57:27 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:17 -0800 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 9 Dec 2025 04:57:16 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Tue, 9 Dec 2025 04:57:12 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Moshe Shemesh , Breno Leitao , Alexandre Cassen , Cosmin Ratiu Subject: [PATCH net 9/9] net/mlx5e: Don't include PSP in the hard MTU calculations Date: Tue, 9 Dec 2025 14:56:17 +0200 Message-ID: <1765284977-1363052-10-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> References: <1765284977-1363052-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A101:EE_|DM4PR12MB6373:EE_ X-MS-Office365-Filtering-Correlation-Id: 5fe87d24-646e-4ade-4b3f-08de372281b9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024|41080700001; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Io5bH4Ae5dwPzNN+jAMDb5+WxascDEu4v2ia7/A6EbZyGi+aTOiHkZhM9GnL?= =?us-ascii?Q?IU/eyien/TMKUsi3xS0MiqxDNq8eI+KFY50xHYRCqTwR9iV9SKbyKPiXN53y?= =?us-ascii?Q?WoyHuPYjq9SoCRAP+HHoHQGGu77jKq14DeTWA51EW4SQK96IlMhlUbJa6eSG?= =?us-ascii?Q?xsGe7TUHwUu2O6MFFEly7QxxmfCrSa/Vwi1R2xy50fNzfM45SDKDkL5+Mdzf?= =?us-ascii?Q?/YG5vj7mwwr6k2q9MrMfv6KUplCO4BkQl9fODgVNK0y2awGmO10X8bZoUnD9?= =?us-ascii?Q?L3PyRTSCBQvozNFPheTmKa5LQ+iCb7k4yTyYEOngbRV/jaDGpHJgJdA/FqCI?= =?us-ascii?Q?8nj74U0a8rdN3RSq0tZqUhURU6850a+36nZGVRnJ9YL8Hyv1DJXjr7gJ0d+T?= =?us-ascii?Q?IztdRER4rEKN8XVijZ8ZP/TvoijgsQ1C1HI9OCmQDh2++4Cw1a122ANXvdsX?= =?us-ascii?Q?+53m5wqdtk+/dJ14e55+bm8dOGG2taq+TIoXC75oMcJo64zBReD0PMCkMpMU?= =?us-ascii?Q?miYI77OJNLJBL+fVD4Ksrekb3MpT8W3hAHM7YtcZ8ySfkQcTo4BSStQPhc0R?= =?us-ascii?Q?PCUHHGI3CwMMdqXe6k0Wal8rDUSOzgDIyTj2GQHm4UMoxFPx8A5+xhchz0RE?= =?us-ascii?Q?KYUhD59oI3uHxQ/TD557l61vCzgB+KlyVOjRqeJytz0rJRUVZvNnvAB/Go73?= =?us-ascii?Q?sRApdcfaiH6DE5maZSLCUHwRQAml2sDGJABnARA2kKIAxHl73t74Ousu6YLm?= =?us-ascii?Q?SIMLinyfoOKiwp9XBRZVZoQsDQ9uB4dEV5XePXueswYGW4pcF9zI0wp9Ogg2?= =?us-ascii?Q?7gXpquTSI28/HLzzEHgrsxTTN8BIVHb9ZuxU9rZbTvfryBzwh8ELCnu2wROn?= =?us-ascii?Q?z+B/9jTD+IRHFjNCMDmu/XjmRSfTd6DJTdXusuJDJJB+l7RQ2yxAytAdM9Sv?= =?us-ascii?Q?WduQCKbfvD1Mo2mhMoZqTtO96IKhKE7NXcznVFIUC+4p3A4ErsrnnLTyMWIu?= =?us-ascii?Q?9USHqWoZNpM6vtoVIVmG3m+ZIyMqyqWs9STSIn5dP+Skk5qf2NWlctXVHBGl?= =?us-ascii?Q?h+p1VULS3ahZPg6J3zequW4KIJso7HPpAPX2SPWlrDUG557PKhO0ODIC+HT/?= =?us-ascii?Q?vfKklIb+69aeXIavmQZ8oWNk3pymDDqL43W0OGuXB/djAPJR9cFZD36IDOeq?= =?us-ascii?Q?h0tw+f4NsdNUoxkTqZpDX6mCDRNIQWJ5TFvD3ZseQACHpmXnjjkIIr58Yrjt?= =?us-ascii?Q?gM3PddCvMLt8CYMkvYM1AHQqxg9oEnNJbZG5JVQpjxOcGg+ypB09j7udnR1n?= =?us-ascii?Q?OKRVqkSFiB2hxFe1QCIt0cCKIf3TH13ANC13gZ0SC6t2ap4o1FksGRLMcjJ1?= =?us-ascii?Q?hDzkwJa3RuNDQ330qrUo4wsAd4nu3pLGYyh37kvxqApwV8VZnWln5MA6dCwc?= =?us-ascii?Q?rIgC8t4Tdy9DQE3clCUmiIKM87aAZzqtAs39U1QINhPvDh9BYwUAd+tO3Swh?= =?us-ascii?Q?PtC5XT6/AdcsSYMR7lJTQ2Y3V/Hq6Ag08dNBpVSuBCfsMIGMdvq5SjkWTCwg?= =?us-ascii?Q?V14KRGsIwzWes3xvkSO/cSCgrevY5Vl64789K0QH?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(376014)(82310400026)(1800799024)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 12:57:27.6415 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5fe87d24-646e-4ade-4b3f-08de372281b9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A101.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6373 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cosmin Ratiu Commit [1] added the 40 bytes required by the PSP header+trailer and the UDP header to MLX5E_ETH_HARD_MTU, which limits the device-wide max software MTU that could be set. This is not okay, because most packets are not PSP packets and it doesn't make sense to always reserve space for headers which won't get added in most cases. As it turns out, for TCP connections, PSP overhead is already taken into account in the TCP MSS calculations via inet_csk(sk)->icsk_ext_hdr_len. This was added in commit [2]. This means that the extra space reserved in the hard MTU for mlx5 ends up unused and wasted. Remove the unnecessary 40 byte reservation from hard MTU. [1] commit e5a1861a298e ("net/mlx5e: Implement PSP Tx data path") [2] commit e97269257fe4 ("net: psp: update the TCP MSS to reflect PSP packet overhead") Fixes: e5a1861a298e ("net/mlx5e: Implement PSP Tx data path") Signed-off-by: Cosmin Ratiu Reviewed-by: Shahar Shitrit Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/eth= ernet/mellanox/mlx5/core/en.h index 811178d8976c..262dc032e276 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -69,7 +69,7 @@ struct page_pool; #define MLX5E_METADATA_ETHER_TYPE (0x8CE4) #define MLX5E_METADATA_ETHER_LEN 8 =20 -#define MLX5E_ETH_HARD_MTU (ETH_HLEN + PSP_ENCAP_HLEN + PSP_TRL_SIZE + VLA= N_HLEN + ETH_FCS_LEN) +#define MLX5E_ETH_HARD_MTU (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) =20 #define MLX5E_HW2SW_MTU(params, hwmtu) ((hwmtu) - ((params)->hard_mtu)) #define MLX5E_SW2HW_MTU(params, swmtu) ((swmtu) + ((params)->hard_mtu)) --=20 2.31.1