From nobody Sun Dec 14 18:12:23 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5FA43168F8; Tue, 4 Nov 2025 08:17:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762244249; cv=none; b=hJBrbCu1LDWN/Y421sCIC98EV1lFfF19Iw795//3pnvuTsSlMjbj+G+zpr5k4R2yvT3KTtHkm+WOhz9sYlQlk02dXgtW+KfSDNCe2Z0RGkGm9ycgu/R5xnnEOfsx16z5ZsPpOl6+ixrVSLfHkAoHRIKE4pKUV+Jn6Z+Q3g4W3nU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762244249; c=relaxed/simple; bh=2NNfxeZL9lKcJUFdmUuVnZqE2G0XLX/YECb8kNUOZmM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=qd6JiP2NynfVX2Oq8AdtgtXOigUIOCDSaT0wJcT8Wnv/HkKLqVWzcQHzOZYKA4kw4jYFzC3rJrFvjzWlaTM35g5YGnJelxMlvl3IMtYqlmF8clWqSKAMezrrZbWgfaqkM50fUT1/BRSnVXl75j+23F5NaQ6Pw2jCLM+IfHRoTts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=whAFu/D8; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Ed1S9vhB; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="whAFu/D8"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Ed1S9vhB" Date: Tue, 04 Nov 2025 08:17:24 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1762244246; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5e+xCZks8DjB4th8+TGJyulN/W7+y3w7SC/uoo8hkxI=; b=whAFu/D88u1XWojUV2QD36y+vn4Q2VH4B4xBfkC+Hp3W8k9X5j6E3FqEesR12flNiTnZkJ WyQJSam3iistxO7HRTUUZFpCniKJE0Cb2SKIDoim/IgUdS82NogbgQdRlTJwDve2cgT41S 3K9ROYTFQhK8anc8/ZkD0ARs4F54zTpVS2rMIELiviR4/+rl4L/Uz0tEo8kcuALvAYUc/E zu5hBUz+L5GspW0UPJoQfmM7odXa0QNf7QDANeQpAOAGa0HYs5coSTWxsZuaCGdvUGz1Qr qWHC/vlN2ExyBVs8t515z/jpaaRJ8jXOy1LaIGKkuXxnN7dJfDZ50gWpyd6ZDg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1762244246; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5e+xCZks8DjB4th8+TGJyulN/W7+y3w7SC/uoo8hkxI=; b=Ed1S9vhBaaNXwGKxFZN4NUPizVRZO5UUL0b2gb3QbhTnYSXhODZ7PMMnppPzn5QPbNnX/c XVAFdlhYOGGlLJAA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: core/rseq] rseq: Cache CPU ID and MM CID values Cc: Thomas Gleixner , "Peter Zijlstra (Intel)" , Ingo Molnar , Mathieu Desnoyers , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20251027084306.841964081@linutronix.de> References: <20251027084306.841964081@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <176224424469.2601451.15679496627091592162.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the core/rseq branch of tip: Commit-ID: 4b7de6df20d43dd651031aef8d818fa5da981dbf Gitweb: https://git.kernel.org/tip/4b7de6df20d43dd651031aef8d818fa5d= a981dbf Author: Thomas Gleixner AuthorDate: Mon, 27 Oct 2025 09:44:45 +01:00 Committer: Ingo Molnar CommitterDate: Tue, 04 Nov 2025 08:32:14 +01:00 rseq: Cache CPU ID and MM CID values In preparation for rewriting RSEQ exit to user space handling provide storage to cache the CPU ID and MM CID values which were written to user space. That prepares for a quick check, which avoids the update when nothing changed. Signed-off-by: Thomas Gleixner Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Ingo Molnar Reviewed-by: Mathieu Desnoyers Link: https://patch.msgid.link/20251027084306.841964081@linutronix.de --- include/linux/rseq.h | 7 +++++-- include/linux/rseq_types.h | 21 +++++++++++++++++++++ include/trace/events/rseq.h | 4 ++-- kernel/rseq.c | 4 ++++ 4 files changed, 32 insertions(+), 4 deletions(-) diff --git a/include/linux/rseq.h b/include/linux/rseq.h index ab91b1e..d315a92 100644 --- a/include/linux/rseq.h +++ b/include/linux/rseq.h @@ -57,6 +57,7 @@ static inline void rseq_virt_userspace_exit(void) static inline void rseq_reset(struct task_struct *t) { memset(&t->rseq, 0, sizeof(t->rseq)); + t->rseq.ids.cpu_cid =3D ~0ULL; } =20 static inline void rseq_execve(struct task_struct *t) @@ -70,10 +71,12 @@ static inline void rseq_execve(struct task_struct *t) */ static inline void rseq_fork(struct task_struct *t, u64 clone_flags) { - if (clone_flags & CLONE_VM) + if (clone_flags & CLONE_VM) { rseq_reset(t); - else + } else { t->rseq =3D current->rseq; + t->rseq.ids.cpu_cid =3D ~0ULL; + } } =20 #else /* CONFIG_RSEQ */ diff --git a/include/linux/rseq_types.h b/include/linux/rseq_types.h index f7a60c8..40901b0 100644 --- a/include/linux/rseq_types.h +++ b/include/linux/rseq_types.h @@ -31,17 +31,38 @@ struct rseq_event { }; =20 /** + * struct rseq_ids - Cache for ids, which need to be updated + * @cpu_cid: Compound of @cpu_id and @mm_cid to make the + * compiler emit a single compare on 64-bit + * @cpu_id: The CPU ID which was written last to user space + * @mm_cid: The MM CID which was written last to user space + * + * @cpu_id and @mm_cid are updated when the data is written to user space. + */ +struct rseq_ids { + union { + u64 cpu_cid; + struct { + u32 cpu_id; + u32 mm_cid; + }; + }; +}; + +/** * struct rseq_data - Storage for all rseq related data * @usrptr: Pointer to the registered user space RSEQ memory * @len: Length of the RSEQ region * @sig: Signature of critial section abort IPs * @event: Storage for event management + * @ids: Storage for cached CPU ID and MM CID */ struct rseq_data { struct rseq __user *usrptr; u32 len; u32 sig; struct rseq_event event; + struct rseq_ids ids; }; =20 #else /* CONFIG_RSEQ */ diff --git a/include/trace/events/rseq.h b/include/trace/events/rseq.h index 823b47d..ce85d65 100644 --- a/include/trace/events/rseq.h +++ b/include/trace/events/rseq.h @@ -21,9 +21,9 @@ TRACE_EVENT(rseq_update, ), =20 TP_fast_assign( - __entry->cpu_id =3D raw_smp_processor_id(); + __entry->cpu_id =3D t->rseq.ids.cpu_id; __entry->node_id =3D cpu_to_node(__entry->cpu_id); - __entry->mm_cid =3D task_mm_cid(t); + __entry->mm_cid =3D t->rseq.ids.mm_cid; ), =20 TP_printk("cpu_id=3D%d node_id=3D%d mm_cid=3D%d", __entry->cpu_id, diff --git a/kernel/rseq.c b/kernel/rseq.c index aae6266..ad1e7ce 100644 --- a/kernel/rseq.c +++ b/kernel/rseq.c @@ -184,6 +184,10 @@ static int rseq_update_cpu_node_id(struct task_struct = *t) rseq_unsafe_put_user(t, node_id, node_id, efault_end); rseq_unsafe_put_user(t, mm_cid, mm_cid, efault_end); =20 + /* Cache the user space values */ + t->rseq.ids.cpu_id =3D cpu_id; + t->rseq.ids.mm_cid =3D mm_cid; + /* * Additional feature fields added after ORIG_RSEQ_SIZE * need to be conditionally updated only if