From nobody Mon Feb 9 09:34:06 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C46BF31D384; Mon, 3 Nov 2025 14:47:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762181279; cv=none; b=Za/9J8ZtWN2wyRpYHZMd/nYkEGd/fyxp8Y7tg4BWg8rVYQVprDl/cR2+SCmjQjP+QcWehRq4DyywJSTQ8FCWS2jJ2Y1DppXjB0fo9AxKFHLKzdM7LWpAn8JyOMPEUwR2jDfTn66zpCftxJ6MbQqKoUVBqeuueIy3b8XGooZ8lIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762181279; c=relaxed/simple; bh=ik9FleyYBSbn/eO6fDyYBYuN3Egq/4HsV53arWKnNX0=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=PVOxjcooFL3xBgGQ5XgHGi0v3sh3NBETmmYElXthrRSFrCGcjXQBqh9pA3XcKbIzLbszJ2KiV7d5x08hWDITKCaNePcxOxF/Kt+DMnnG/qf165FQsWbAPu61roHXGNyQ0umD7Slq9UnESxL7VsWz73610aMirCWqFUHbDaypAk4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=vrzUTujL; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=rRL4GI68; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="vrzUTujL"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="rRL4GI68" Date: Mon, 03 Nov 2025 14:47:55 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1762181276; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rRiaeXWNtDk9gece+Trcu7QHWkG/6K0dVZCiT0crMmc=; b=vrzUTujLwdEpIMo+ZLFF/yUbrHWlswRMzw4hsRy9q8QgygU6SqRvYSrkAAyyPME56HOlKd yzmHvPIDRvaoUU/iLoaRDUUzjqRgj2Eb1f61qOowYh1rSX1+RkUkRY+s71Kkz1yXMmXnMr d5ug4zEYgigJVxW3LsH2vZQm6sTYKbiCMvGVc/2A5lqYIhSRV070zQQLVbp0TqabGxq5Va 7Wx9aKG9qDVHjQQR8kr7IqX5Hl9rVU3W+8IC3cfqgXmmmEVRPIMOF06R8BAKN+De940GM8 gVN1DRP7Fy87x16y/QxwA1u34ptUPlfQ5TV8zc6u+rtPtBXZrLVj2c4FkxLqQQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1762181276; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rRiaeXWNtDk9gece+Trcu7QHWkG/6K0dVZCiT0crMmc=; b=rRL4GI68CkGvYf5xYLy+gvXxR7PpkEsJNi4rEg2IuGoqMbbnJFAIS+UbJfcgd3AcYKJZxE T0uKaQbBZzvc/tCQ== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: core/rseq] rseq: Move algorithm comment to top Cc: Thomas Gleixner , "Peter Zijlstra (Intel)" , Mathieu Desnoyers , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20251027084306.149519580@linutronix.de> References: <20251027084306.149519580@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <176218127500.2601451.3335770317580002330.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the core/rseq branch of tip: Commit-ID: 02cde183ec67135d7ac01898c0ab77e29ad2c19f Gitweb: https://git.kernel.org/tip/02cde183ec67135d7ac01898c0ab77e29= ad2c19f Author: Thomas Gleixner AuthorDate: Mon, 27 Oct 2025 09:44:20 +01:00 Committer: Peter Zijlstra CommitterDate: Mon, 03 Nov 2025 15:26:13 +01:00 rseq: Move algorithm comment to top Move the comment which documents the RSEQ algorithm to the top of the file, so it does not create horrible diffs later when the actual implementation is fed into the mincer. Signed-off-by: Thomas Gleixner Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Mathieu Desnoyers Link: https://patch.msgid.link/20251027084306.149519580@linutronix.de --- kernel/rseq.c | 119 ++++++++++++++++++++++++------------------------- 1 file changed, 59 insertions(+), 60 deletions(-) diff --git a/kernel/rseq.c b/kernel/rseq.c index 246319d..51fafc4 100644 --- a/kernel/rseq.c +++ b/kernel/rseq.c @@ -8,6 +8,65 @@ * Mathieu Desnoyers */ =20 +/* + * Restartable sequences are a lightweight interface that allows + * user-level code to be executed atomically relative to scheduler + * preemption and signal delivery. Typically used for implementing + * per-cpu operations. + * + * It allows user-space to perform update operations on per-cpu data + * without requiring heavy-weight atomic operations. + * + * Detailed algorithm of rseq user-space assembly sequences: + * + * init(rseq_cs) + * cpu =3D TLS->rseq::cpu_id_start + * [1] TLS->rseq::rseq_cs =3D rseq_cs + * [start_ip] ---------------------------- + * [2] if (cpu !=3D TLS->rseq::cpu_id) + * goto abort_ip; + * [3] + * [post_commit_ip] ---------------------------- + * + * The address of jump target abort_ip must be outside the critical + * region, i.e.: + * + * [abort_ip] < [start_ip] || [abort_ip] >=3D [post_commit_ip] + * + * Steps [2]-[3] (inclusive) need to be a sequence of instructions in + * userspace that can handle being interrupted between any of those + * instructions, and then resumed to the abort_ip. + * + * 1. Userspace stores the address of the struct rseq_cs assembly + * block descriptor into the rseq_cs field of the registered + * struct rseq TLS area. This update is performed through a single + * store within the inline assembly instruction sequence. + * [start_ip] + * + * 2. Userspace tests to check whether the current cpu_id field match + * the cpu number loaded before start_ip, branching to abort_ip + * in case of a mismatch. + * + * If the sequence is preempted or interrupted by a signal + * at or after start_ip and before post_commit_ip, then the kernel + * clears TLS->__rseq_abi::rseq_cs, and sets the user-space return + * ip to abort_ip before returning to user-space, so the preempted + * execution resumes at abort_ip. + * + * 3. Userspace critical section final instruction before + * post_commit_ip is the commit. The critical section is + * self-terminating. + * [post_commit_ip] + * + * 4. + * + * On failure at [2], or if interrupted by preempt or signal delivery + * between [1] and [3]: + * + * [abort_ip] + * F1. + */ + #include #include #include @@ -98,66 +157,6 @@ static int rseq_validate_ro_fields(struct task_struct *= t) unsafe_put_user(value, &t->rseq->field, error_label) #endif =20 -/* - * - * Restartable sequences are a lightweight interface that allows - * user-level code to be executed atomically relative to scheduler - * preemption and signal delivery. Typically used for implementing - * per-cpu operations. - * - * It allows user-space to perform update operations on per-cpu data - * without requiring heavy-weight atomic operations. - * - * Detailed algorithm of rseq user-space assembly sequences: - * - * init(rseq_cs) - * cpu =3D TLS->rseq::cpu_id_start - * [1] TLS->rseq::rseq_cs =3D rseq_cs - * [start_ip] ---------------------------- - * [2] if (cpu !=3D TLS->rseq::cpu_id) - * goto abort_ip; - * [3] - * [post_commit_ip] ---------------------------- - * - * The address of jump target abort_ip must be outside the critical - * region, i.e.: - * - * [abort_ip] < [start_ip] || [abort_ip] >=3D [post_commit_ip] - * - * Steps [2]-[3] (inclusive) need to be a sequence of instructions in - * userspace that can handle being interrupted between any of those - * instructions, and then resumed to the abort_ip. - * - * 1. Userspace stores the address of the struct rseq_cs assembly - * block descriptor into the rseq_cs field of the registered - * struct rseq TLS area. This update is performed through a single - * store within the inline assembly instruction sequence. - * [start_ip] - * - * 2. Userspace tests to check whether the current cpu_id field match - * the cpu number loaded before start_ip, branching to abort_ip - * in case of a mismatch. - * - * If the sequence is preempted or interrupted by a signal - * at or after start_ip and before post_commit_ip, then the kernel - * clears TLS->__rseq_abi::rseq_cs, and sets the user-space return - * ip to abort_ip before returning to user-space, so the preempted - * execution resumes at abort_ip. - * - * 3. Userspace critical section final instruction before - * post_commit_ip is the commit. The critical section is - * self-terminating. - * [post_commit_ip] - * - * 4. - * - * On failure at [2], or if interrupted by preempt or signal delivery - * between [1] and [3]: - * - * [abort_ip] - * F1. - */ - static int rseq_update_cpu_node_id(struct task_struct *t) { struct rseq __user *rseq =3D t->rseq;