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Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Parav Pandit , Shay Drory Subject: [PATCH net-next V2 2/4] net/mlx5: Lag, move devcom registration to LAG layer Date: Mon, 15 Sep 2025 15:41:08 +0300 Message-ID: <1757940070-618661-3-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1757940070-618661-1-git-send-email-tariqt@nvidia.com> References: <1757940070-618661-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0002992C:EE_|IA0PR12MB8838:EE_ X-MS-Office365-Filtering-Correlation-Id: 65c4545e-8c18-433f-4236-08ddf455481d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?M95R4JLmHIX1g8imJkKCm+Ec0WTTas6jDRX/+WvHEKqcwvw03kSqeUSuUY+T?= =?us-ascii?Q?6sy7mzHnOBt1nhlEb9BeUw7cQKduYeMyyRmefCz29V/LT2jowQkfcUWAAZVQ?= =?us-ascii?Q?5F0TGppY+d50hfMLU00y8mBh8BKHD3UKMpXl7RR1dst5Czr9zNbbZXcb81+8?= =?us-ascii?Q?pvUJyXjqmg1v1PXrchtMlvqcQWgpH1VdRZ0L4L1CcjIfvKgwDEg8a3jPG+EY?= =?us-ascii?Q?grGJvH5FDi13Ei2cmHCZvn68EXW7TXxyHfhaditgX+CyUimNpLgI4OvV32hG?= =?us-ascii?Q?MyVzVTesHz8E4tfP5+YTHeTRGlNx7+qRQ+ehIgdLsaFwmlf396Cbp8uKZgES?= =?us-ascii?Q?TrEae5+ihSw/ix3vixiotcs70ha6d66iK1HuHmbFcaFZZ+FTcX97fCDr7YiJ?= =?us-ascii?Q?UPFGSmoik0XvDg2hY4+t3hEELSwxW+n21OM9dxbjg/peR3DfaK7cSbF2xeU9?= =?us-ascii?Q?sUnHlgDbrpxLh0KEpS4gkizodfKLy+4H1G+lRRY6ItjvTJq0wcBQAZH/VurJ?= =?us-ascii?Q?ruP5zf5A9ZTKY3hCwelaiBncBYsywpUUmB67LZQ2sg1kbcefaAaVuj6+neLG?= =?us-ascii?Q?fETwoHnRddLOQ9l8MV7pY+Xi+LB0SLzl4UFuVFmV238vbmOi/GdtUeoyCjV/?= =?us-ascii?Q?Vb0reOuPzByq7O2MJpxuihEbA0PXugXs9AkyZwnwT+YGAdjqF0N7YhtyyG0v?= =?us-ascii?Q?nYFgJ+cNAaVYyz3x3OOiFUy7eH0aFzM2s4pRSOKSTpOHualPjiuhjCBOw1UO?= =?us-ascii?Q?y4lZygxeii5KjPXCbjzjpkbdj+0gI4UxppnSdDFZ4nNN+erpc5GDlIrBhqXn?= =?us-ascii?Q?vrgbqPq36OpPokT7dQEUxlIaGmOMwIPLMuGPcY7vCDpAxonxDF3UuxNRHLmA?= =?us-ascii?Q?dL9sZb1exmhZ+/QC3g9TBHHI10zYTPkTRvjrlUFdTS1bQfHzpQ8E3ho6mFnW?= =?us-ascii?Q?L55kihlCLOpmMcNjWDYQ8f/keEq7fKTT2ciOCecg5lcOVQDYwiwm9Hu7Ihp+?= =?us-ascii?Q?OhQArUmEQj13LakNc+oxHzhdeaNveZVjjiYMAg1+mVQ1/NTbpGi3cqdIIBSh?= =?us-ascii?Q?+XbK3VyDE84CFafw3LBPVStNq2hD7FGSVGaj/PiExfg7JV6srwsyXNVPXx3S?= =?us-ascii?Q?R+XfYu+p1cucvwBJUi+ADAwgJK31hxh81As6Pb0e43YDvJGy1bK8EjqUKHiC?= =?us-ascii?Q?g/Q4SI/+06RfjZlz77h7U+2o6fqjiuhMU7tAvSRq6Y4UGc5bfJvlb6QfkjxP?= =?us-ascii?Q?3Os65pvrWFEQ2+5xCpvXxvnrSox79mRF87sWZWYeozRIB3BHgcw7egsO1bYb?= =?us-ascii?Q?zHeDzoQEbv/2za1gQ1ocb7POhkmzcZCMqci3IcyXF8Pmdw0HS3XKZFqSYU0K?= =?us-ascii?Q?0jgt/EI3879oTNljvcG1hKf9WOgMIcrEyTQ7yFRQgjbCYa/hYZ4cCdgavNXz?= =?us-ascii?Q?0w1DkUVy4qpHtavfAHBhiKEFpbJ8y+mprz25sC/vfH32JbYCW95R5BeRi1fj?= =?us-ascii?Q?FCFDnTsRRCrfzRsg1A4GfbDsghkhdPkZ88DA?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2025 12:42:07.3978 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 65c4545e-8c18-433f-4236-08ddf455481d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8838 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory Move the devcom registration for the HCA_PORTS component from the core initialization path into the LAG logic. This better reflects the logical ownership of this component and ensures proper alignment with the LAG lifecycle. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Reviewed-by: Simon Horman Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 31 ++++++++++++++++++- .../net/ethernet/mellanox/mlx5/core/main.c | 27 ---------------- 2 files changed, 30 insertions(+), 28 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/lag/lag.c index d058cbb4a00c..ccb22ed13f84 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -1404,6 +1404,34 @@ static int __mlx5_lag_dev_add_mdev(struct mlx5_core_= dev *dev) return 0; } =20 +static void mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev *dev) +{ + mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp); +} + +static int mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev *dev) +{ + struct mlx5_devcom_match_attr attr =3D { + .key.val =3D mlx5_query_nic_system_image_guid(dev), + }; + + /* This component is use to sync adding core_dev to lag_dev and to sync + * changes of mlx5_adev_devices between LAG layer and other layers. + */ + dev->priv.hca_devcom_comp =3D + mlx5_devcom_register_component(dev->priv.devc, + MLX5_DEVCOM_HCA_PORTS, + &attr, NULL, dev); + if (IS_ERR(dev->priv.hca_devcom_comp)) { + mlx5_core_err(dev, + "Failed to register devcom HCA component, err: %ld\n", + PTR_ERR(dev->priv.hca_devcom_comp)); + return PTR_ERR(dev->priv.hca_devcom_comp); + } + + return 0; +} + void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev) { struct mlx5_lag *ldev; @@ -1425,6 +1453,7 @@ void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev) } mlx5_ldev_remove_mdev(ldev, dev); mutex_unlock(&ldev->lock); + mlx5_lag_unregister_hca_devcom_comp(dev); mlx5_ldev_put(ldev); } =20 @@ -1435,7 +1464,7 @@ void mlx5_lag_add_mdev(struct mlx5_core_dev *dev) if (!mlx5_lag_is_supported(dev)) return; =20 - if (IS_ERR_OR_NULL(dev->priv.hca_devcom_comp)) + if (mlx5_lag_register_hca_devcom_comp(dev)) return; =20 recheck: diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 1f7942202e14..eb3ac98a2621 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -973,30 +973,6 @@ static void mlx5_pci_close(struct mlx5_core_dev *dev) mlx5_pci_disable_device(dev); } =20 -static void mlx5_register_hca_devcom_comp(struct mlx5_core_dev *dev) -{ - struct mlx5_devcom_match_attr attr =3D { - .key.val =3D mlx5_query_nic_system_image_guid(dev), - }; - - /* This component is use to sync adding core_dev to lag_dev and to sync - * changes of mlx5_adev_devices between LAG layer and other layers. - */ - if (!mlx5_lag_is_supported(dev)) - return; - - dev->priv.hca_devcom_comp =3D - mlx5_devcom_register_component(dev->priv.devc, MLX5_DEVCOM_HCA_PORTS, - &attr, NULL, dev); - if (IS_ERR(dev->priv.hca_devcom_comp)) - mlx5_core_err(dev, "Failed to register devcom HCA component\n"); -} - -static void mlx5_unregister_hca_devcom_comp(struct mlx5_core_dev *dev) -{ - mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp); -} - static int mlx5_init_once(struct mlx5_core_dev *dev) { int err; @@ -1005,7 +981,6 @@ static int mlx5_init_once(struct mlx5_core_dev *dev) if (IS_ERR(dev->priv.devc)) mlx5_core_warn(dev, "failed to register devcom device %ld\n", PTR_ERR(dev->priv.devc)); - mlx5_register_hca_devcom_comp(dev); =20 err =3D mlx5_query_board_id(dev); if (err) { @@ -1143,7 +1118,6 @@ static int mlx5_init_once(struct mlx5_core_dev *dev) err_irq_cleanup: mlx5_irq_table_cleanup(dev); err_devcom: - mlx5_unregister_hca_devcom_comp(dev); mlx5_devcom_unregister_device(dev->priv.devc); =20 return err; @@ -1174,7 +1148,6 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *d= ev) mlx5_events_cleanup(dev); mlx5_eq_table_cleanup(dev); mlx5_irq_table_cleanup(dev); - mlx5_unregister_hca_devcom_comp(dev); mlx5_devcom_unregister_device(dev->priv.devc); } =20 --=20 2.31.1