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Mon, 15 Sep 2025 05:25:26 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Jianbo Liu Subject: [PATCH net V2 2/3] net/mlx5e: Prevent entering switchdev mode with inconsistent netns Date: Mon, 15 Sep 2025 15:24:33 +0300 Message-ID: <1757939074-617281-3-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1757939074-617281-1-git-send-email-tariqt@nvidia.com> References: <1757939074-617281-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0F9:EE_|CH3PR12MB7569:EE_ X-MS-Office365-Filtering-Correlation-Id: 3545b550-f67f-4ff0-a1f4-08ddf452ff5f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?2lGamxrNm0A5BFmPq+aNSrxgTGDbAglwmlZcO4XxHkQsl6cC9n/KQT8nHTEW?= =?us-ascii?Q?tPESsMvUPA+udRsJZG7dTrOgwPWrF8QLiAW0w87JitufYzms82Ii/rUj+bWp?= =?us-ascii?Q?YSnqOHaGf9gZ0oSdTTNZch3bMfQ3LNpwvB2fbeXSnOtudqBTDBLckKn4SxCz?= =?us-ascii?Q?h7LKrDCYKfMfMi1YBOsF/+oRqLAFsJQ1R16gUylp6XXkFqHbJbpT1FmPaexX?= =?us-ascii?Q?w4IYILSvjNcQtIB0/tH6MmK+M21A9cFkKAo8py0XF81HgtB2c+HmcPReEshT?= =?us-ascii?Q?mHbjLe9ATmFVywJ/myCmoeGC+fnqAa3nukuA1N7+tfavKeMLpYhaDZ3qwXa4?= =?us-ascii?Q?6KYxOYfFvUexzVV7w1D2RWc5ctJ13b8j6CydrQ8wPGYXCLama/wTRJsY7fX0?= =?us-ascii?Q?Ji+zmNFlqeimL3bgGZUEaI3y/zuu/Uvr2T/aKV6aVhMnv2RCdQUuvpKmCrlQ?= =?us-ascii?Q?LGBgIp/+8NLptavmaqjdUMQxtg8b4UEps/q/x8PtqwxC2tMJ9z57ampLzjvG?= =?us-ascii?Q?DSIRTqdIAWedxLd6q1FhPhcZsrRMV8oHkPVvJstcGZJQj8ZF+mUAOPgQZypI?= =?us-ascii?Q?DCeR2RFtkYKzTSX5kvQWiMRQI5eHdVr+CfzSbh1t3fx9lc5Fo5hnH73dTH+F?= =?us-ascii?Q?qp8n59e4Vt44unw0T72Xm2hTVOTwZW4K6lH7czoJvd5L7PS1LDkTNyKLjn0Z?= =?us-ascii?Q?CXX7MyDXRin8mZ01oEsBBbo/y0WJ+38+3pPUpIJ1iDwN+U3BLPkRfh3r5aKg?= =?us-ascii?Q?oahN5UwhMnQ3IMUzYHDwWT58FoFqt0fokX+k5T+i214jN3GhyKVYMOa+Sipe?= =?us-ascii?Q?xmHdzn5PNNY7TZG28NxqBBtTFmOwsLG5yhMPa/++kO5kpmzIOuXPMDeQMY5N?= =?us-ascii?Q?lytNsx27rnSIlIqjArpo4dj2a1HCHyC/EiT/2uqQ0LC3BNZ2wJiRERWnNWYE?= =?us-ascii?Q?xki+xRMYdhmrYOZ6P2LFbz4wQR8/e5tUqiPsBSv/mPsLYFAos8IOEpLChzgc?= =?us-ascii?Q?EJFvSarbgd1o1lZVOB7pD4UqEf4gJ5nfW0x6gEttmKNTTqXl1tlwxpN969+f?= =?us-ascii?Q?zzXapGZr9ld8V042DeF4kYS4bINoAIoSwXqpigGso5S8Q7ftyrtyxJdDILS8?= =?us-ascii?Q?LNWFRCdgMh6FDqOjX/l50WPy7irK1Wjhuhksus+EZ6bYUsRqUosP4WfrcMRc?= =?us-ascii?Q?zGjPoffsTbE/k+NKkgKXH4FiFbOcaKFg2c4PqcvF9n6iXERZHwepGkEHwroZ?= =?us-ascii?Q?MvmMgWGQWPFfgQ7rw2GmrLfi55ED95TdpY4YBdB3p1AR6qlCxW949PvuzwdP?= =?us-ascii?Q?sRUnhgbK/2S0PEIJ3yB+dTrIU0KAGVNxZBGkJpv1issomy6Q8VKD3NQPRjwz?= =?us-ascii?Q?i/XyuNe6vu5d8gK1FBhal+7GJBjxmcpLFhm55ghIV2vWdEg9TgpA9ShAFd56?= =?us-ascii?Q?ZBPQS0RUCNviGFb65QvrJQXpaJeqf3kIvtCaWUBfZRsd69QMXfdHoijI5Zfs?= =?us-ascii?Q?Y3+IcJ3wsnfAdTe5vKRBPEbqwdEBligtDciL?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2025 12:25:46.3596 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3545b550-f67f-4ff0-a1f4-08ddf452ff5f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7569 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jianbo Liu When a PF enters switchdev mode, its netdevice becomes the uplink representor but remains in its current network namespace. All other representors (VFs, SFs) are created in the netns of the devlink instance. If the PF's netns has been moved and differs from the devlink's netns, enabling switchdev mode would create a state where the OVS control plane (ovs-vsctl) cannot manage the switch because the PF uplink representor and the other representors are split across different namespaces. To prevent this inconsistent configuration, block the request to enter switchdev mode if the PF netdevice's netns does not match the netns of its devlink instance. As part of this change, the PF's netns is first marked as immutable. This prevents race conditions where the netns could be changed after the check is performed but before the mode transition is complete, and it aligns the PF's behavior with that of the final uplink representor. Fixes: 71c6eaebf06a ("net/mlx5e: Set netdev name space on creation") Signed-off-by: Jianbo Liu Reviewed-by: Cosmin Ratiu Reviewed-by: Jiri Pirko Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/eswitch_offloads.c | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/d= rivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index bee906661282..b204ed459760 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -3739,6 +3739,29 @@ void mlx5_eswitch_unblock_mode(struct mlx5_core_dev = *dev) up_write(&esw->mode_lock); } =20 +/* Returns false only when uplink netdev exists and its netns is different= from + * devlink's netns. True for all others so entering switchdev mode is allo= wed. + */ +static bool mlx5_devlink_netdev_netns_immutable_set(struct devlink *devlin= k, + bool immutable) +{ + struct mlx5_core_dev *mdev =3D devlink_priv(devlink); + struct net_device *netdev; + bool ret; + + netdev =3D mlx5_uplink_netdev_get(mdev); + if (!netdev) + return true; + + rtnl_lock(); + netdev->netns_immutable =3D immutable; + ret =3D net_eq(dev_net(netdev), devlink_net(devlink)); + rtnl_unlock(); + + mlx5_uplink_netdev_put(mdev, netdev); + return ret; +} + int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode, struct netlink_ext_ack *extack) { @@ -3781,6 +3804,14 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *de= vlink, u16 mode, esw->eswitch_operation_in_progress =3D true; up_write(&esw->mode_lock); =20 + if (mode =3D=3D DEVLINK_ESWITCH_MODE_SWITCHDEV && + !mlx5_devlink_netdev_netns_immutable_set(devlink, true)) { + NL_SET_ERR_MSG_MOD(extack, + "Can't change E-Switch mode to switchdev when netdev net namespace = has diverged from the devlink's."); + err =3D -EINVAL; + goto skip; + } + if (mode =3D=3D DEVLINK_ESWITCH_MODE_LEGACY) esw->dev->priv.flags |=3D MLX5_PRIV_FLAGS_SWITCH_LEGACY; mlx5_eswitch_disable_locked(esw); @@ -3799,6 +3830,8 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *dev= link, u16 mode, } =20 skip: + if (mode =3D=3D DEVLINK_ESWITCH_MODE_SWITCHDEV && err) + mlx5_devlink_netdev_netns_immutable_set(devlink, false); down_write(&esw->mode_lock); esw->eswitch_operation_in_progress =3D false; unlock: --=20 2.31.1