From nobody Thu Oct 2 15:34:38 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D4252EA489; Mon, 15 Sep 2025 07:48:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757922531; cv=none; b=YIJqvVM/Cpd4D7xF7RhXhjAViyKM0dY0BzRgudjlucAUNEwYLux0pXxjCsh2eRrKAN8cuIBoWT2rvwJyjHuA2bR6FBY4A6EZyYAjb/F6inE3aOg2wWWZg9uqWIuChnLUb4BT2Eble/TaGMydBomQC5SWgqQCl6yIUChMr8PPuB4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757922531; c=relaxed/simple; bh=ik8/bSfwcsTmWOudbsXV5QDCuiZqP2irkmiMZ49Oh1I=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=WxNyPyrusdAnIPJKIsERqvzYLdFkIKCepgoHOL6McZm6eFf/H0vJlHYEBkqAIq5IITurQknN85Gu+7Qsh5XdRuASZF4oYGed/OVopdBtgn5RjKfUs6n4qGnwVxqo1wuvr2AGpCjbKJ+zQE/ris+YzdHoYg0W64ePGkqIeTIkQ80= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=F8n3KQZh; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Nl1mJ6Qp; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="F8n3KQZh"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Nl1mJ6Qp" Date: Mon, 15 Sep 2025 07:48:46 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1757922527; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=s92aWGp/0Yjk+KmJfoakuLWMA2GoxqIupTdgFcQwM1c=; b=F8n3KQZhOT9I+Yh8u7q9HHmN4tVxiaW+67vXvzjaSKRkBAb1iVyLiNBI8FytfPCN6SF9PJ pNyFnLawU5CA5+oQWhf6ka4GRAtK1EfT+kJt7wMdqARBD71a6Cl4rUtLALlxmtpgPwlfUq sijqvDj7Ad24Oife1F/LgLsPrtw2fTZERLkJSqvxWzbjL0zew8yazmlVzyVYJFn3j0WB0U mx2wfN2I8XyQpFeyRi9BK7wJpklOJrPkRRfmH17STCvGmne/+9zCLh3VD5oaLEH3HFtQMY SQt0nHhUA3Xk11QaQdXS6fRrYq1J3EwImLa1ZFABR7xDv21K5rtiXreX/n5ObA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1757922527; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=s92aWGp/0Yjk+KmJfoakuLWMA2GoxqIupTdgFcQwM1c=; b=Nl1mJ6Qpe+57WV8lI7RzgJbaSQZsKmgARALqeFXMmV1DjZX8LUt05NAWtiXic6QgCISDaq NVtrl3Jf7JhZSBAw== From: "tip-bot2 for Boqun Feng" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: locking/core] rust: sync: atomic: Add Atomic<{usize,isize}> Cc: Boqun Feng , "Peter Zijlstra (Intel)" , Alice Ryhl , Andreas Hindborg , Benno Lossin , Elle Rhumsaa , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250905044141.77868-9-boqun.feng@gmail.com> References: <20250905044141.77868-9-boqun.feng@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175792252659.709179.4538649923640914127.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the locking/core branch of tip: Commit-ID: 84c6d36bcaf98a8c0533cd334a624d536d20879b Gitweb: https://git.kernel.org/tip/84c6d36bcaf98a8c0533cd334a624d536= d20879b Author: Boqun Feng AuthorDate: Thu, 04 Sep 2025 21:41:35 -07:00 Committer: Peter Zijlstra CommitterDate: Mon, 15 Sep 2025 09:38:34 +02:00 rust: sync: atomic: Add Atomic<{usize,isize}> Add generic atomic support for `usize` and `isize`. Note that instead of mapping directly to `atomic_long_t`, the represention type (`AtomicType::Repr`) is selected based on CONFIG_64BIT. This reduces the necessity of creating `atomic_long_*` helpers, which could save the binary size of kernel if inline helpers are not available. To do so, an internal type `isize_atomic_repr` is defined, it's `i32` in 32bit kernel and `i64` in 64bit kernel. Signed-off-by: Boqun Feng Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Alice Ryhl Reviewed-by: Andreas Hindborg Reviewed-by: Benno Lossin Reviewed-by: Elle Rhumsaa Link: https://lore.kernel.org/all/20250719030827.61357-9-boqun.feng@gmail.c= om/ --- rust/kernel/sync/atomic/predefine.rs | 53 ++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 4 deletions(-) diff --git a/rust/kernel/sync/atomic/predefine.rs b/rust/kernel/sync/atomic= /predefine.rs index d087581..45a1798 100644 --- a/rust/kernel/sync/atomic/predefine.rs +++ b/rust/kernel/sync/atomic/predefine.rs @@ -2,6 +2,9 @@ =20 //! Pre-defined atomic types =20 +use crate::static_assert; +use core::mem::{align_of, size_of}; + // SAFETY: `i32` has the same size and alignment with itself, and is round= -trip transmutable to // itself. unsafe impl super::AtomicType for i32 { @@ -28,6 +31,35 @@ unsafe impl super::AtomicAdd for i64 { } } =20 +// Defines an internal type that always maps to the integer type which has= the same size alignment +// as `isize` and `usize`, and `isize` and `usize` are always bi-direction= al transmutable to +// `isize_atomic_repr`, which also always implements `AtomicImpl`. +#[allow(non_camel_case_types)] +#[cfg(not(CONFIG_64BIT))] +type isize_atomic_repr =3D i32; +#[allow(non_camel_case_types)] +#[cfg(CONFIG_64BIT)] +type isize_atomic_repr =3D i64; + +// Ensure size and alignment requirements are checked. +static_assert!(size_of::() =3D=3D size_of::()); +static_assert!(align_of::() =3D=3D align_of::()); +static_assert!(size_of::() =3D=3D size_of::()); +static_assert!(align_of::() =3D=3D align_of::()); + +// SAFETY: `isize` has the same size and alignment with `isize_atomic_repr= `, and is round-trip +// transmutable to `isize_atomic_repr`. +unsafe impl super::AtomicType for isize { + type Repr =3D isize_atomic_repr; +} + +// SAFETY: The wrapping add result of two `isize_atomic_repr`s is a valid = `usize`. +unsafe impl super::AtomicAdd for isize { + fn rhs_into_delta(rhs: isize) -> isize_atomic_repr { + rhs as isize_atomic_repr + } +} + // SAFETY: `u32` and `i32` has the same size and alignment, and `u32` is r= ound-trip transmutable to // `i32`. unsafe impl super::AtomicType for u32 { @@ -54,6 +86,19 @@ unsafe impl super::AtomicAdd for u64 { } } =20 +// SAFETY: `usize` has the same size and alignment with `isize_atomic_repr= `, and is round-trip +// transmutable to `isize_atomic_repr`. +unsafe impl super::AtomicType for usize { + type Repr =3D isize_atomic_repr; +} + +// SAFETY: The wrapping add result of two `isize_atomic_repr`s is a valid = `usize`. +unsafe impl super::AtomicAdd for usize { + fn rhs_into_delta(rhs: usize) -> isize_atomic_repr { + rhs as isize_atomic_repr + } +} + use crate::macros::kunit_tests; =20 #[kunit_tests(rust_atomics)] @@ -73,7 +118,7 @@ mod tests { =20 #[test] fn atomic_basic_tests() { - for_each_type!(42 in [i32, i64, u32, u64] |v| { + for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| { let x =3D Atomic::new(v); =20 assert_eq!(v, x.load(Relaxed)); @@ -82,7 +127,7 @@ mod tests { =20 #[test] fn atomic_xchg_tests() { - for_each_type!(42 in [i32, i64, u32, u64] |v| { + for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| { let x =3D Atomic::new(v); =20 let old =3D v; @@ -95,7 +140,7 @@ mod tests { =20 #[test] fn atomic_cmpxchg_tests() { - for_each_type!(42 in [i32, i64, u32, u64] |v| { + for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| { let x =3D Atomic::new(v); =20 let old =3D v; @@ -110,7 +155,7 @@ mod tests { =20 #[test] fn atomic_arithmetic_tests() { - for_each_type!(42 in [i32, i64, u32, u64] |v| { + for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| { let x =3D Atomic::new(v); =20 assert_eq!(v, x.fetch_add(12, Full));