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Wed, 10 Sep 2025 23:31:33 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Parav Pandit , Shay Drory Subject: [PATCH net-next 1/4] net/mlx5: Refactor devcom to use match attributes Date: Thu, 11 Sep 2025 09:31:04 +0300 Message-ID: <1757572267-601785-2-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> References: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00006001:EE_|PH7PR12MB7843:EE_ X-MS-Office365-Filtering-Correlation-Id: b0422a2f-1b78-4783-cc6d-08ddf0fce379 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?PflB94c8uG1NZtMnlCyHf3Tt7ApKx1uGLFgisHlndn0qROb1pEeMOuap3w31?= =?us-ascii?Q?lkrz2ABTUzlxCLmzajU6qv+dXQo/zXKnA/xq5IefFuHe7rHKiRax00SGiqOf?= =?us-ascii?Q?QVGcrEBrEXtcjfiLibfRlxPQFIdC1zGqRAKUTdIZrCEeDxPvksPbRyB/btSY?= =?us-ascii?Q?SubIn3CdXGgBEOlUWV/iw7lSFHoASgzBsHp/ptymO+gGD7mpmWpaKfVB75Wi?= =?us-ascii?Q?ENkYrrslwjyHGuuiZWmVvEXKgHXJh7oKHx1IbyZ1TI5/QjBqRACTcmDVYJCL?= =?us-ascii?Q?GvP1fBmFRPlbqEAY2jiAn3KFtj73r890NoYU8i4aw/HLwYNCD2LrVdSLomdf?= =?us-ascii?Q?FMqrzoO+n7f9Nr5dGkrBO9tY4+8lFTSghUKZSuQ+Cw93fjN3WwguUslApkxv?= =?us-ascii?Q?kHSLV/wht+LlNWe8BIlDecl3A273XG0l4t2YkGAPAE2a4Wc6UzcKai6ABVrE?= =?us-ascii?Q?1CL5Z1QxoDZu/40dcON3DUprHFGUsGtCJHyDwWbcvzhY5m2IxWrL1fTtY46k?= =?us-ascii?Q?HiUDPi11dazBp6GFJujLi1sOFfGzlFckeHEhBBa2Q2A9+YnzjbJthx1An4Th?= =?us-ascii?Q?q58NO/EIG9VolSFI2HiVnyPIu+FIqHeLtvzJ4Uo2Orbt0HdcVGlh0dBI8Bvw?= =?us-ascii?Q?D92SwuDLkC9rk/8ncYXTF4o2ChR4sesobFMf7M9VFEJsoKngt0aTzx4cke99?= =?us-ascii?Q?WNwHouNMP6z22PltlvS1mRjIo0UcXKRZHz7ruH+WSpnIwFf+DNZ6PNcDKjWW?= =?us-ascii?Q?gqfyWlZzGu/bv0p4m1kVj/eAwvoUnlrUd71OpzkWc2H3GRZkLcn5w27ygHv9?= =?us-ascii?Q?qIe2gVGmi3F6APasQ3oF1Wjvco9SF+AtnoTFBD3qqTai9zjnBZd2xqJUd/qF?= =?us-ascii?Q?NIAtNiDN0Ih2BwljaTcHfd/RUehpryfNT2ZMiKahiT8mk6oxJQRpOikY1Ceg?= =?us-ascii?Q?v9nrhWGeraRA489Rr4H1z6b6KvY88c45fSuAFZ/ho6i3dr+IoZgNduyquy1b?= =?us-ascii?Q?Z3H3mCl3ycgKbF/HtIkVkRKkK/SQsghrxnQOGlMnMj6Qrges/aO2+Vl2YsGG?= =?us-ascii?Q?aPjgR+Tbr9cB5gUtWTgYRkBrxMoF4kHkIKjHtF4p+I9MHRQcCiAe3mX7kIAl?= =?us-ascii?Q?huPnbv4y/S89mseBrd9k7F7//0r6LGTSIK9+gXUXrdhb68q+HOUkYTz/1uGM?= =?us-ascii?Q?vjkbDMi/k6Wu/WjU88b8DOHVclyoHmh2v5E6Akcg5bfN0nFEJ7OWMMLCK+BL?= =?us-ascii?Q?4+VFILpPGr3RVbiWcp0Xy3ETWjJMA7SO35/j9XLr2FZeQAwQzeg7OTiehpBJ?= =?us-ascii?Q?Q8LEkdpmojPnltSXovz21E1ns090uworZXnWKcz9qLxfG4OcwvuucsrdApFn?= =?us-ascii?Q?86rcRHgTJAVtKhoVSraOm0Q5Ss2GighpCKuDcEq9CzRlqjCdTiAHqxCQURMa?= =?us-ascii?Q?Ox3ktjEp/t7Mxu7YCqg6Nnkv83pBpOQlAGgwrQ9S6FsJBBBm97R1w6kvaUBq?= =?us-ascii?Q?z8bw/1YoNbh3//YbS2kd4EqnuTMiQeyfE2Dq?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2025 06:31:49.3488 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0422a2f-1b78-4783-cc6d-08ddf0fce379 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00006001.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7843 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory Refactor the devcom interface to use a match attribute structure instead of passing raw keys. This change lays the groundwork for extending devcom matching logic with additional fields like net namespace, improving its flexibility and robustness. No functional changes. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman --- .../net/ethernet/mellanox/mlx5/core/en_main.c | 6 +++- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 7 +++-- .../net/ethernet/mellanox/mlx5/core/eswitch.h | 7 +++-- .../mellanox/mlx5/core/eswitch_offloads.c | 5 +-- .../ethernet/mellanox/mlx5/core/lib/clock.c | 14 ++++++--- .../ethernet/mellanox/mlx5/core/lib/devcom.c | 31 +++++++++++++------ .../ethernet/mellanox/mlx5/core/lib/devcom.h | 10 +++++- .../net/ethernet/mellanox/mlx5/core/lib/sd.c | 4 ++- .../net/ethernet/mellanox/mlx5/core/main.c | 7 +++-- 9 files changed, 65 insertions(+), 26 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/en_main.c index 714cce595692..fe5f5ae433b7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -235,9 +235,13 @@ static int mlx5e_devcom_event_mpv(int event, void *my_= data, void *event_data) =20 static int mlx5e_devcom_init_mpv(struct mlx5e_priv *priv, u64 *data) { + struct mlx5_devcom_match_attr attr =3D { + .key.val =3D *data, + }; + priv->devcom =3D mlx5_devcom_register_component(priv->mdev->priv.devc, MLX5_DEVCOM_MPV, - *data, + &attr, mlx5e_devcom_event_mpv, priv); if (IS_ERR(priv->devcom)) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/= ethernet/mellanox/mlx5/core/en_tc.c index 32c07a8b03d1..9874a15c6fba 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c @@ -5387,12 +5387,13 @@ void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht) int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv) { const size_t sz_enc_opts =3D sizeof(struct tunnel_match_enc_opts); + struct mlx5_devcom_match_attr attr =3D {}; struct netdev_phys_item_id ppid; struct mlx5e_rep_priv *rpriv; struct mapping_ctx *mapping; struct mlx5_eswitch *esw; struct mlx5e_priv *priv; - u64 mapping_id, key; + u64 mapping_id; int err =3D 0; =20 rpriv =3D container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv); @@ -5448,8 +5449,8 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *up= link_priv) =20 err =3D netif_get_port_parent_id(priv->netdev, &ppid, false); if (!err) { - memcpy(&key, &ppid.id, sizeof(key)); - mlx5_esw_offloads_devcom_init(esw, key); + memcpy(&attr.key.val, &ppid.id, sizeof(attr.key.val)); + mlx5_esw_offloads_devcom_init(esw, &attr); } =20 return 0; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/ne= t/ethernet/mellanox/mlx5/core/eswitch.h index 4fe285ce32aa..df3756d7e52e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h @@ -433,7 +433,8 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int n= um_vfs); void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf); void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw); void mlx5_eswitch_disable(struct mlx5_eswitch *esw); -void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key); +void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, + const struct mlx5_devcom_match_attr *attr); void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw); bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw); int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw, @@ -928,7 +929,9 @@ static inline void mlx5_eswitch_cleanup(struct mlx5_esw= itch *esw) {} static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vf= s) { return 0; } static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bo= ol clear_vf) {} static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {} -static inline void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,= u64 key) {} +static inline void +mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, + const struct mlx5_devcom_match_attr *attr) {} static inline void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *e= sw) {} static inline bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *= esw) { return false; } static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev= ) { return false; } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/d= rivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index d57f86d297ab..bc9838dc5bf8 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -3104,7 +3104,8 @@ static int mlx5_esw_offloads_devcom_event(int event, return err; } =20 -void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key) +void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, + const struct mlx5_devcom_match_attr *attr) { int i; =20 @@ -3123,7 +3124,7 @@ void mlx5_esw_offloads_devcom_init(struct mlx5_eswitc= h *esw, u64 key) esw->num_peers =3D 0; esw->devcom =3D mlx5_devcom_register_component(esw->dev->priv.devc, MLX5_DEVCOM_ESW_OFFLOADS, - key, + attr, mlx5_esw_offloads_devcom_event, esw); if (IS_ERR(esw->devcom)) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/= net/ethernet/mellanox/mlx5/core/lib/clock.c index 7ad3baca99de..8f2ad45bec9f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c @@ -1435,14 +1435,20 @@ static int mlx5_clock_alloc(struct mlx5_core_dev *m= dev, bool shared) static void mlx5_shared_clock_register(struct mlx5_core_dev *mdev, u64 key) { struct mlx5_core_dev *peer_dev, *next =3D NULL; + struct mlx5_devcom_match_attr attr =3D { + .key.val =3D key, + }; + struct mlx5_devcom_comp_dev *compd; struct mlx5_devcom_comp_dev *pos; =20 - mdev->clock_state->compdev =3D mlx5_devcom_register_component(mdev->priv.= devc, - MLX5_DEVCOM_SHARED_CLOCK, - key, NULL, mdev); - if (IS_ERR(mdev->clock_state->compdev)) + compd =3D mlx5_devcom_register_component(mdev->priv.devc, + MLX5_DEVCOM_SHARED_CLOCK, + &attr, NULL, mdev); + if (IS_ERR(compd)) return; =20 + mdev->clock_state->compdev =3D compd; + mlx5_devcom_comp_lock(mdev->clock_state->compdev); mlx5_devcom_for_each_peer_entry(mdev->clock_state->compdev, peer_dev, pos= ) { if (peer_dev->clock) { diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c b/drivers= /net/ethernet/mellanox/mlx5/core/lib/devcom.c index 7b0766c89f4c..1ab9de316deb 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c @@ -22,11 +22,15 @@ struct mlx5_devcom_dev { struct kref ref; }; =20 +struct mlx5_devcom_key { + union mlx5_devcom_match_key key; +}; + struct mlx5_devcom_comp { struct list_head comp_list; enum mlx5_devcom_component id; - u64 key; struct list_head comp_dev_list_head; + struct mlx5_devcom_key key; mlx5_devcom_event_handler_t handler; struct kref ref; bool ready; @@ -108,7 +112,8 @@ void mlx5_devcom_unregister_device(struct mlx5_devcom_d= ev *devc) } =20 static struct mlx5_devcom_comp * -mlx5_devcom_comp_alloc(u64 id, u64 key, mlx5_devcom_event_handler_t handle= r) +mlx5_devcom_comp_alloc(u64 id, const struct mlx5_devcom_match_attr *attr, + mlx5_devcom_event_handler_t handler) { struct mlx5_devcom_comp *comp; =20 @@ -117,7 +122,7 @@ mlx5_devcom_comp_alloc(u64 id, u64 key, mlx5_devcom_eve= nt_handler_t handler) return ERR_PTR(-ENOMEM); =20 comp->id =3D id; - comp->key =3D key; + comp->key.key =3D attr->key; comp->handler =3D handler; init_rwsem(&comp->sem); lockdep_register_key(&comp->lock_key); @@ -180,21 +185,27 @@ devcom_free_comp_dev(struct mlx5_devcom_comp_dev *dev= com) static bool devcom_component_equal(struct mlx5_devcom_comp *devcom, enum mlx5_devcom_component id, - u64 key) + const struct mlx5_devcom_match_attr *attr) { - return devcom->id =3D=3D id && devcom->key =3D=3D key; + if (devcom->id !=3D id) + return false; + + if (memcmp(&devcom->key.key, &attr->key, sizeof(devcom->key.key))) + return false; + + return true; } =20 static struct mlx5_devcom_comp * devcom_component_get(struct mlx5_devcom_dev *devc, enum mlx5_devcom_component id, - u64 key, + const struct mlx5_devcom_match_attr *attr, mlx5_devcom_event_handler_t handler) { struct mlx5_devcom_comp *comp; =20 devcom_for_each_component(comp) { - if (devcom_component_equal(comp, id, key)) { + if (devcom_component_equal(comp, id, attr)) { if (handler =3D=3D comp->handler) { kref_get(&comp->ref); return comp; @@ -212,7 +223,7 @@ devcom_component_get(struct mlx5_devcom_dev *devc, struct mlx5_devcom_comp_dev * mlx5_devcom_register_component(struct mlx5_devcom_dev *devc, enum mlx5_devcom_component id, - u64 key, + const struct mlx5_devcom_match_attr *attr, mlx5_devcom_event_handler_t handler, void *data) { @@ -223,14 +234,14 @@ mlx5_devcom_register_component(struct mlx5_devcom_dev= *devc, return ERR_PTR(-EINVAL); =20 mutex_lock(&comp_list_lock); - comp =3D devcom_component_get(devc, id, key, handler); + comp =3D devcom_component_get(devc, id, attr, handler); if (IS_ERR(comp)) { devcom =3D ERR_PTR(-EINVAL); goto out_unlock; } =20 if (!comp) { - comp =3D mlx5_devcom_comp_alloc(id, key, handler); + comp =3D mlx5_devcom_comp_alloc(id, attr, handler); if (IS_ERR(comp)) { devcom =3D ERR_CAST(comp); goto out_unlock; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h b/drivers= /net/ethernet/mellanox/mlx5/core/lib/devcom.h index c79699b94a02..f350d2395707 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h @@ -6,6 +6,14 @@ =20 #include =20 +union mlx5_devcom_match_key { + u64 val; +}; + +struct mlx5_devcom_match_attr { + union mlx5_devcom_match_key key; +}; + enum mlx5_devcom_component { MLX5_DEVCOM_ESW_OFFLOADS, MLX5_DEVCOM_MPV, @@ -25,7 +33,7 @@ void mlx5_devcom_unregister_device(struct mlx5_devcom_dev= *devc); struct mlx5_devcom_comp_dev * mlx5_devcom_register_component(struct mlx5_devcom_dev *devc, enum mlx5_devcom_component id, - u64 key, + const struct mlx5_devcom_match_attr *attr, mlx5_devcom_event_handler_t handler, void *data); void mlx5_devcom_unregister_component(struct mlx5_devcom_comp_dev *devcom); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c b/drivers/net= /ethernet/mellanox/mlx5/core/lib/sd.c index eeb0b7ea05f1..d4015328ba65 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c @@ -210,13 +210,15 @@ static void sd_cleanup(struct mlx5_core_dev *dev) static int sd_register(struct mlx5_core_dev *dev) { struct mlx5_devcom_comp_dev *devcom, *pos; + struct mlx5_devcom_match_attr attr =3D {}; struct mlx5_core_dev *peer, *primary; struct mlx5_sd *sd, *primary_sd; int err, i; =20 sd =3D mlx5_get_sd(dev); + attr.key.val =3D sd->group_id; devcom =3D mlx5_devcom_register_component(dev->priv.devc, MLX5_DEVCOM_SD_= GROUP, - sd->group_id, NULL, dev); + &attr, NULL, dev); if (IS_ERR(devcom)) return PTR_ERR(devcom); =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 0951c7cc1b5f..1f7942202e14 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -975,6 +975,10 @@ static void mlx5_pci_close(struct mlx5_core_dev *dev) =20 static void mlx5_register_hca_devcom_comp(struct mlx5_core_dev *dev) { + struct mlx5_devcom_match_attr attr =3D { + .key.val =3D mlx5_query_nic_system_image_guid(dev), + }; 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Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Parav Pandit , Shay Drory Subject: [PATCH net-next 2/4] net/mlx5: Lag, move devcom registration to LAG layer Date: Thu, 11 Sep 2025 09:31:05 +0300 Message-ID: <1757572267-601785-3-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> References: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AE6:EE_|CH2PR12MB4261:EE_ X-MS-Office365-Filtering-Correlation-Id: de145ebb-cf59-452b-5a50-08ddf0fce8f8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ARl3bdVnN7ZbHnqRKjIM1t7shqRF8E+cv1/wmD1r4EJGe2TcaMHp4PyZJ0Kn?= =?us-ascii?Q?SFQ/Kf18ovr89csgNBVrE3Rr1F7yjHDDKNBoTwPr8Jd3GE0FF1WETkFkBWOE?= =?us-ascii?Q?Ib9wLf2OeckiWR9iuOF0+tFF4AcsqZqJhFoPalPek0c2S0oCfH4erMiwIs6G?= =?us-ascii?Q?QIm84nlEEP8ONW9MvKI8wLOqxfe+O1bXXfsVZBqXWD6WzfVbepGhjbfDKriC?= =?us-ascii?Q?cqBhQcff0qQqRnnnV6wYx526LWOXGAnOqNMIIy9UiE9NwBNQm3q4I7VNjCsA?= =?us-ascii?Q?YPJw2/ulv3N1gLwuLx30Bmhr88idgixUCEfdwoxve4dk6r84jdO0v8KUxFFD?= =?us-ascii?Q?Rq5T6b9QmI1yEUtiKtl11eZO3uYqrYUnYrUelU0B9ZYIk2HQYH627VEYWHPb?= =?us-ascii?Q?KUh+psCzYt+bA7AXP8pLEfiPc4vkOvueliJ/+URog66lkwO7jDQhVU0RsB7b?= =?us-ascii?Q?F4OTq6PR5idj4JnaGDymJLyMEYqla0DkWv0onsGDj+qtt6DtHA2BbfXLeBhY?= =?us-ascii?Q?W/5yLBnWu8H8NF/gcetY9yrxXtBrxG29AjD8XW0+qADbsPfUfP6elFZMu1Ul?= =?us-ascii?Q?UWnvs5dEd430uE6ProwZdfQLCTozoUKjjldxJNtbjJ9XZPc2JUOM2WvMJKzP?= =?us-ascii?Q?Nj6aN8v+gBsvVWvfN/JADAiuEdR5vWaP1TrfpxWT1zR6nSzxmuVoxZrM4X2L?= =?us-ascii?Q?rMfPiJQupAHSiORrWRlr5ZT6mppKfmzFnheoumvYeSOWP8LZcx+QChty/CXT?= =?us-ascii?Q?Jv7nvYKt7QnDSIINorIiItYXPMrL+knA7/QCrKuJndCpvsBKP3dDUH5kPUZb?= =?us-ascii?Q?XxMu4i5NYNanvKJ5Goqn2O0bqlAnvLrJhKsMyW5Kp47Lh1d/JyJtdwRulSDj?= =?us-ascii?Q?B6ymqFz9SedM60NOoEt+NyptYTlXQNUzBiWsn5N3lUgKYd+xKg0HpwXq+tFA?= =?us-ascii?Q?oiW2IuSQPMmmxauPk3gwMjjMfmAjs7/SXghkQkWGbebClm63xhHzmo7p6dPt?= =?us-ascii?Q?ZxJU+p9EKeLO6ZHKjM/hEMwzHWsVb02OIQqVnQLR78p5FiwsGJtGyBbDhTD2?= =?us-ascii?Q?GN5w0ey2wrw9x8htD5+IjvIbkdWPbArsEdC++WozCVnnGULptf3lmS8yJd7L?= =?us-ascii?Q?13mN1hziMXPHKis3zhAJPi5A5bz6IUsRWC87kqGw2OzXlmgrrOZOk9e3smzE?= =?us-ascii?Q?piFJ7Tp/BNC8WGGN6GBWmr1oYQ8zir72TjALvX2qg/wY7BlC4uyv0eDSWsu8?= =?us-ascii?Q?ZHJN6nJnYYYUciW3x29wSzmkk05anGgZ3qQ7l4HSiE8wRIHBg+zz+VvEw6Ye?= =?us-ascii?Q?I5pcFNeipGmtcQTroujOL/KAJ/+D6v81xx3gJ0T2iGiII+vFeZPJ5e4NEUZH?= =?us-ascii?Q?KNUU+i48id+UEwzwPS8wyaSSnxErp7yw2DaQrDZsYMUYsMZmnOsZEdqDvRaB?= =?us-ascii?Q?NV3BCv6i8OVE+da42ww/6ybVy7bDWXR6/MiVUqIt0td1nzvYvKUv1o/FtGMg?= =?us-ascii?Q?xY3AaWLzgpDhlNizCa2fSoPB+LCvh5Ivhryu?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2025 06:31:58.6115 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: de145ebb-cf59-452b-5a50-08ddf0fce8f8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AE6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4261 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory Move the devcom registration for the HCA_PORTS component from the core initialization path into the LAG logic. This better reflects the logical ownership of this component and ensures proper alignment with the LAG lifecycle. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman --- .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 31 ++++++++++++++++++- .../net/ethernet/mellanox/mlx5/core/main.c | 27 ---------------- 2 files changed, 30 insertions(+), 28 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/lag/lag.c index d058cbb4a00c..ccb22ed13f84 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -1404,6 +1404,34 @@ static int __mlx5_lag_dev_add_mdev(struct mlx5_core_= dev *dev) return 0; } =20 +static void mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev *dev) +{ + mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp); +} + +static int mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev *dev) +{ + struct mlx5_devcom_match_attr attr =3D { + .key.val =3D mlx5_query_nic_system_image_guid(dev), + }; + + /* This component is use to sync adding core_dev to lag_dev and to sync + * changes of mlx5_adev_devices between LAG layer and other layers. + */ + dev->priv.hca_devcom_comp =3D + mlx5_devcom_register_component(dev->priv.devc, + MLX5_DEVCOM_HCA_PORTS, + &attr, NULL, dev); + if (IS_ERR(dev->priv.hca_devcom_comp)) { + mlx5_core_err(dev, + "Failed to register devcom HCA component, err: %ld\n", + PTR_ERR(dev->priv.hca_devcom_comp)); + return PTR_ERR(dev->priv.hca_devcom_comp); + } + + return 0; +} + void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev) { struct mlx5_lag *ldev; @@ -1425,6 +1453,7 @@ void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev) } mlx5_ldev_remove_mdev(ldev, dev); mutex_unlock(&ldev->lock); + mlx5_lag_unregister_hca_devcom_comp(dev); mlx5_ldev_put(ldev); } =20 @@ -1435,7 +1464,7 @@ void mlx5_lag_add_mdev(struct mlx5_core_dev *dev) if (!mlx5_lag_is_supported(dev)) return; =20 - if (IS_ERR_OR_NULL(dev->priv.hca_devcom_comp)) + if (mlx5_lag_register_hca_devcom_comp(dev)) return; =20 recheck: diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 1f7942202e14..eb3ac98a2621 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -973,30 +973,6 @@ static void mlx5_pci_close(struct mlx5_core_dev *dev) mlx5_pci_disable_device(dev); } =20 -static void mlx5_register_hca_devcom_comp(struct mlx5_core_dev *dev) -{ - struct mlx5_devcom_match_attr attr =3D { - .key.val =3D mlx5_query_nic_system_image_guid(dev), - }; - - /* This component is use to sync adding core_dev to lag_dev and to sync - * changes of mlx5_adev_devices between LAG layer and other layers. - */ - if (!mlx5_lag_is_supported(dev)) - return; - - dev->priv.hca_devcom_comp =3D - mlx5_devcom_register_component(dev->priv.devc, MLX5_DEVCOM_HCA_PORTS, - &attr, NULL, dev); - if (IS_ERR(dev->priv.hca_devcom_comp)) - mlx5_core_err(dev, "Failed to register devcom HCA component\n"); -} - -static void mlx5_unregister_hca_devcom_comp(struct mlx5_core_dev *dev) -{ - mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp); -} - static int mlx5_init_once(struct mlx5_core_dev *dev) { int err; @@ -1005,7 +981,6 @@ static int mlx5_init_once(struct mlx5_core_dev *dev) if (IS_ERR(dev->priv.devc)) mlx5_core_warn(dev, "failed to register devcom device %ld\n", PTR_ERR(dev->priv.devc)); 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The existing devcom matching logic was based solely on numeric keys, limiting its use to the global (init_net) scope or requiring clients to ignore namespaces altogether, both of which are incorrect in multi-namespace environments. This patch introduces namespace support by allowing devcom clients to provide a namespace match attribute. The devcom pairing mechanism is updated to compare the namespace, enabling proper isolation and interaction of components across different net namespaces. With this change, components that require namespace aware pairing, such as SD groups or LAG, can now work correctly in multi-namespace scenarios. In particular, this opens the way to support hardware LAG within a net namespace. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Reviewed-by: Parav Pandit Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman --- drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 3 +++ .../net/ethernet/mellanox/mlx5/core/lib/devcom.c | 13 +++++++++++++ .../net/ethernet/mellanox/mlx5/core/lib/devcom.h | 6 ++++++ drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c | 2 ++ 4 files changed, 24 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/= ethernet/mellanox/mlx5/core/en_tc.c index 9874a15c6fba..09c3eecb836d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c @@ -66,6 +66,7 @@ #include "lib/devcom.h" #include "lib/geneve.h" #include "lib/fs_chains.h" +#include "lib/mlx5.h" #include "diag/en_tc_tracepoint.h" #include #include "lag/lag.h" @@ -5450,6 +5451,8 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *up= link_priv) err =3D netif_get_port_parent_id(priv->netdev, &ppid, false); if (!err) { memcpy(&attr.key.val, &ppid.id, sizeof(attr.key.val)); + attr.flags =3D MLX5_DEVCOM_MATCH_FLAGS_NS; + attr.net =3D mlx5_core_net(esw->dev); mlx5_esw_offloads_devcom_init(esw, &attr); } =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c b/drivers= /net/ethernet/mellanox/mlx5/core/lib/devcom.c index 1ab9de316deb..faa2833602c8 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c @@ -4,6 +4,7 @@ #include #include #include "lib/devcom.h" +#include "lib/mlx5.h" #include "mlx5_core.h" =20 static LIST_HEAD(devcom_dev_list); @@ -23,7 +24,9 @@ struct mlx5_devcom_dev { }; =20 struct mlx5_devcom_key { + u32 flags; union mlx5_devcom_match_key key; + possible_net_t net; }; =20 struct mlx5_devcom_comp { @@ -123,6 +126,9 @@ mlx5_devcom_comp_alloc(u64 id, const struct mlx5_devcom= _match_attr *attr, =20 comp->id =3D id; comp->key.key =3D attr->key; + comp->key.flags =3D attr->flags; + if (attr->flags & MLX5_DEVCOM_MATCH_FLAGS_NS) + write_pnet(&comp->key.net, attr->net); comp->handler =3D handler; init_rwsem(&comp->sem); lockdep_register_key(&comp->lock_key); @@ -190,9 +196,16 @@ devcom_component_equal(struct mlx5_devcom_comp *devcom, if (devcom->id !=3D id) return false; =20 + if (devcom->key.flags !=3D attr->flags) + return false; + if (memcmp(&devcom->key.key, &attr->key, sizeof(devcom->key.key))) return false; =20 + if (devcom->key.flags & MLX5_DEVCOM_MATCH_FLAGS_NS && + !net_eq(read_pnet(&devcom->key.net), attr->net)) + return false; + return true; } =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h b/drivers= /net/ethernet/mellanox/mlx5/core/lib/devcom.h index f350d2395707..609c85f47917 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h @@ -6,12 +6,18 @@ =20 #include =20 +enum mlx5_devom_match_flags { + MLX5_DEVCOM_MATCH_FLAGS_NS =3D BIT(0), +}; + union mlx5_devcom_match_key { u64 val; }; =20 struct mlx5_devcom_match_attr { + u32 flags; union mlx5_devcom_match_key key; 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Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Parav Pandit , Shay Drory Subject: [PATCH net-next 4/4] net/mlx5: Lag, add net namespace support Date: Thu, 11 Sep 2025 09:31:07 +0300 Message-ID: <1757572267-601785-5-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> References: <1757572267-601785-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AEB:EE_|LV3PR12MB9119:EE_ X-MS-Office365-Filtering-Correlation-Id: 73b613f1-08dc-47a8-949e-08ddf0fcef11 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?9kO+fbM5SJy9Gprz1vm2EPkZpnsFDIaoCEXz6xdE1xv4q+J2mkKgfal57n9y?= =?us-ascii?Q?xavWtUPrLCR9vQzycD44Nqfpm3MlO+90usitXWbFc2fd6n/eTNIOSMWjTqEC?= =?us-ascii?Q?3rTU8ANQGojek2HmmedLdT4USaV4ziAbghiOxdyXYB0iYa9onI6nkGal0Fxz?= =?us-ascii?Q?XqHhb0PWuGch7cEer2iicVZs56rDItTReh08DviDzBN156CDGDIE08h+iPbn?= =?us-ascii?Q?Uu0dBDjLJkbAGHsOa10NsuyungOqfxlsdafsR7PtrlsaqknHNMZJE9O0NFmJ?= =?us-ascii?Q?u4Gla+L+pSQb7GIerkXSziB2tmBM5MTFcdc5JFU63oaXvuhy7k4r/L5R1nCg?= =?us-ascii?Q?jaIA67Iq7ppJX8tROZ7jcyKrzcnSnCMJ34jnWW2OfTs6FW3p6pViFd/DX5mw?= =?us-ascii?Q?Yp4KdNLOJhNR/DK5kaR1tFi8lm91nT7fCa+7/aShX4aW+dItalkRQAXbCtPz?= =?us-ascii?Q?cqDyA3vWr7Eo/fX9KtKd7WGGGWwWmPwg1SJnG/GjNLEm9BrICketbQRFqhGu?= =?us-ascii?Q?cD0cGqYoHHjcxBznKAY9ks42ZxIhPqnVsPhX+P+ICl2dmNdO62VNkN/eN7wp?= =?us-ascii?Q?gaaANqeQPBZxSOvFQ+IaJQWdyeWbee35WmDLvVJOdjnbaiWZ+ynvNIDVpr85?= =?us-ascii?Q?xq+bUqeRsyQulN9ev095mLZMU0Jrbo1zXIEn8cjdZkXelWwplsYmaJojiW4M?= =?us-ascii?Q?rkvNF3gVu42FzFMZPegiFV0taW/YKp5CE/f3YaFJ5dF95X78Rr/SmzyZXJ2F?= =?us-ascii?Q?66hB8pVZxmRyHBlo6BkgOMnRMSXF/tyxAjjDqnbJegg9/AejwEdCxa7ZUNFi?= =?us-ascii?Q?xoqjcjwY1HD7BoizPZoGTJuFhxnaLRksC/DJDjlUOfadF1PdU4bK7a82fjoC?= =?us-ascii?Q?WhEEoCI6incaVVIzMWxGj7mydG3zhcUXd4KBpyTkHdv/FtD4SnqclL9pJbLD?= =?us-ascii?Q?nSNKagt10Z0ADueExJrtBFXYrl8mB7MBlRVLI13/6dvgzuoz//HTsvOH7+3Y?= =?us-ascii?Q?ksUA4zXIFZZvczlTUu3JXx4lPm4iQ5eH5tyFGdRqMos/i4N0KCaWxqnn1cJ4?= =?us-ascii?Q?m1Mb8/vJb4elcPw0SjYbpKMDGR8oOrHiem7kqn3EsJcegpQEz8t8DsamGLA8?= =?us-ascii?Q?Qwu0o9pB/8z4rgK1Jy03d9UP+Up207TBnmZ4UDEn3AO9JUCbE2TA0YEcL1xe?= =?us-ascii?Q?PCW2pPWO0GKwyVOhVHFxI1mQcWHDpfUMZualcvuiOw/svQGRPZ/xmfwKE+Ws?= =?us-ascii?Q?meuqq4EQeRnNHqEYn2GI7HYCP8cs2LRKTN1HmBE651JYXsAzlFCbL/AaJbpg?= =?us-ascii?Q?o6xyS1Re+vc04exCxDyHAYQeoSRAjcY/6fA2uPzsWeMEsT8Y9N8c+fW9xwIR?= =?us-ascii?Q?/avcertP0QHk2kUULCBELfriYEvQ8XJ8KuCfLRyRnH734dgZT4isV+KUOihC?= =?us-ascii?Q?wqY/7oqVrrU9kNQrzzG/hHGFCcnvO+csmKY5HRZkH0XQCVeOj1pXFmRTDeJe?= =?us-ascii?Q?sQbDioEajLZ6b4Eez2+miTQ0U+gJrebeW7W+?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2025 06:32:08.8458 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73b613f1-08dc-47a8-949e-08ddf0fcef11 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AEB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9119 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shay Drory Update the LAG implementation to support net namespace isolation. With recent changes to the devcom framework allowing namespace-aware matching, the LAG layer is updated to register devcom clients with the associated net namespace. This ensures that LAG formation only occurs between mlx5 interfaces that reside in the same namespace. This change ensures that devices in different namespaces do not interfere with each other's LAG setup and behavior. For example, if two PCI PFs are in the same namespace, they are eligible to form a hardware LAG. In addition, reload behavior for LAG is adjusted to handle namespace contexts appropriately. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Reviewed-by: Parav Pandit Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/devlink.c | 5 ----- drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c | 14 +++++++++++--- drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h | 1 + 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/devlink.c index a0b68321355a..bfa44414be82 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c @@ -204,11 +204,6 @@ static int mlx5_devlink_reload_down(struct devlink *de= vlink, bool netns_change, return 0; } =20 - if (mlx5_lag_is_active(dev)) { - NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode"); - return -EOPNOTSUPP; - } - if (mlx5_core_is_mp_slave(dev)) { NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave"); return -EOPNOTSUPP; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/lag/lag.c index ccb22ed13f84..59c00c911275 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -35,6 +35,7 @@ #include #include #include +#include "lib/mlx5.h" #include "lib/devcom.h" #include "mlx5_core.h" #include "eswitch.h" @@ -231,9 +232,13 @@ static void mlx5_do_bond_work(struct work_struct *work= ); static void mlx5_ldev_free(struct kref *ref) { struct mlx5_lag *ldev =3D container_of(ref, struct mlx5_lag, ref); + struct net *net; + + if (ldev->nb.notifier_call) { + net =3D read_pnet(&ldev->net); + unregister_netdevice_notifier_net(net, &ldev->nb); + } =20 - if (ldev->nb.notifier_call) - unregister_netdevice_notifier_net(&init_net, &ldev->nb); mlx5_lag_mp_cleanup(ldev); cancel_delayed_work_sync(&ldev->bond_work); destroy_workqueue(ldev->wq); @@ -271,7 +276,8 @@ static struct mlx5_lag *mlx5_lag_dev_alloc(struct mlx5_= core_dev *dev) INIT_DELAYED_WORK(&ldev->bond_work, mlx5_do_bond_work); =20 ldev->nb.notifier_call =3D mlx5_lag_netdev_event; - if (register_netdevice_notifier_net(&init_net, &ldev->nb)) { + write_pnet(&ldev->net, mlx5_core_net(dev)); + if (register_netdevice_notifier_net(read_pnet(&ldev->net), &ldev->nb)) { ldev->nb.notifier_call =3D NULL; mlx5_core_err(dev, "Failed to register LAG netdev notifier\n"); } @@ -1413,6 +1419,8 @@ static int mlx5_lag_register_hca_devcom_comp(struct m= lx5_core_dev *dev) { struct mlx5_devcom_match_attr attr =3D { .key.val =3D mlx5_query_nic_system_image_guid(dev), + .flags =3D MLX5_DEVCOM_MATCH_FLAGS_NS, + .net =3D mlx5_core_net(dev), }; =20 /* This component is use to sync adding core_dev to lag_dev and to sync diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/ne= t/ethernet/mellanox/mlx5/core/lag/lag.h index c2f256bb2bc2..4918eee2b3da 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h @@ -67,6 +67,7 @@ struct mlx5_lag { struct workqueue_struct *wq; struct delayed_work bond_work; struct notifier_block nb; + possible_net_t net; struct lag_mp lag_mp; struct mlx5_lag_port_sel port_sel; /* Protect lag fields/state changes */ --=20 2.31.1