From nobody Fri Oct 3 06:34:24 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D560301002; Thu, 4 Sep 2025 11:21:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756984862; cv=none; b=gTYzHgjzZeulVEQoIPEGgViCbJ3keeIEhAH9NU3nnX2Pp+QqNSGsyjr9aJ5bz8tjNEr6UT8zu0/2TzJ8homkEftqM34vyy/FtfAW/N+5bDuxYQSMQKc2uLmeDxXNvufKy7SJM46grUFlDuEcV9TB+QXPZukwthRYfM7Zny4lmSA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756984862; c=relaxed/simple; bh=vXldlsSkxO7CfYZyLZhWYtc0xYAjnGe0lCLhJ17Cw6I=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=tmsW6nQLWKp7JgzdbPLArtGefu8PgAHYfQNGnD6R9MWOTWfb5SkpyoeufEeJx3GngoCrNfH3P9/ZnWCsMv023mSbPRTCah8g/FwsL5EsHxCaVH8ym1d+k9SnhuxzoJhvDTL7EBQkMmNB/R0MCMBlv0mdllfavoyxlalNywTaPyc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Q0aCDdFJ; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=asqoea8Q; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Q0aCDdFJ"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="asqoea8Q" Date: Thu, 04 Sep 2025 11:20:58 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1756984859; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8khjP0kdLvtNnKucOHumhFhOnViAs3hKLUmNlGVYnYU=; b=Q0aCDdFJzhakjw7Rr4d0sXi9hn2wrfx3cgiLLjx3e0h63Cd9bGAUbsrBr3ql/veMQL5Pws cLMWmuVJ3c4vDcdL/Ilpl5c5v3jwbm0Q5RNQ6yXLK9BBfyWWbPXYRRGFNnUrHnT3rpfTmq ENpYSzH5voexkWJKitpIbdbsAJ3zAHs51skWqZOK+ORVCCsaTWXIiYkDCaTxB/sBSH8HTJ OERJpZ1SKCtAo61WBW+/wqlk5L69UrLFgWIynMe5evZ4pSIK4jxdjv9Q6iAkO3IGVxdnod /39iXl2ujRdFEiMptjtb1sh31W7ekgikf24YO4qZR+qBTacMbW2ug3gVc6o/IA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1756984859; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8khjP0kdLvtNnKucOHumhFhOnViAs3hKLUmNlGVYnYU=; b=asqoea8Qd2LzRArnbv2HUeyTDuj+xS7IjH4rVOI7h3kOUCTMmrNfNInXIrQB/Y6WCoyhaP waqff3F9tpY3rqBQ== From: "tip-bot2 for Ard Biesheuvel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/sev] x86/boot: Provide PIC aliases for 5-level paging related constants Cc: Ard Biesheuvel , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250828102202.1849035-35-ardb+git@google.com> References: <20250828102202.1849035-35-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175698485836.1920.14017679266511929801.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/sev branch of tip: Commit-ID: f27906b287403af53be26341cf86d73798f15fe8 Gitweb: https://git.kernel.org/tip/f27906b287403af53be26341cf86d7379= 8f15fe8 Author: Ard Biesheuvel AuthorDate: Thu, 28 Aug 2025 12:22:14 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Wed, 03 Sep 2025 17:59:40 +02:00 x86/boot: Provide PIC aliases for 5-level paging related constants Provide PIC aliases for the global variables related to 5-level paging, so that the startup code can access them in order to populate the kernel page tables. Signed-off-by: Ard Biesheuvel Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/20250828102202.1849035-35-ardb+git@google.com --- arch/x86/kernel/head64.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 533fcf5..1bc40d0 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -52,10 +52,13 @@ SYM_PIC_ALIAS(next_early_pgt); pmdval_t early_pmd_flags =3D __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_= NX); =20 unsigned int __pgtable_l5_enabled __ro_after_init; +SYM_PIC_ALIAS(__pgtable_l5_enabled); unsigned int pgdir_shift __ro_after_init =3D 39; EXPORT_SYMBOL(pgdir_shift); +SYM_PIC_ALIAS(pgdir_shift); unsigned int ptrs_per_p4d __ro_after_init =3D 1; EXPORT_SYMBOL(ptrs_per_p4d); +SYM_PIC_ALIAS(ptrs_per_p4d); =20 unsigned long page_offset_base __ro_after_init =3D __PAGE_OFFSET_BASE_L4; EXPORT_SYMBOL(page_offset_base);