From nobody Fri Oct 3 10:11:12 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D023A2ED846; Tue, 2 Sep 2025 10:36:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756809405; cv=none; b=T7Dg3GICq/WLVt2MGWysBCkVX6aqmSAzgJUoWfC9d8XPHpbF+P9VylM5k/NTdtY4QNlQH6dhofpGTxHdTuGY48gnA/9ie6su0Hwxs+tJPlJwdjdUMy/hRGVYY6u8PJln9XZb416U+LdG+xDgANekwwbEgLmWwycZ5xkSTWiWszM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756809405; c=relaxed/simple; bh=gzVwxm4SmceDChnK2jCvaOibHcONDf3fs9JT/ZqdF0k=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=pGjtcCm9Uy0FH2OvmUOdMj61222hIV0Rzc6U8Om9PhLRd/4FqcNLh+JGaNlOGLYeWA6QBHMU/Fdz3dSx8ld9VzKE/J7TFPgnToPqfl+7d2lDueEeCmZNtvpNMh+Akey54H+9D3dQ7TyHIkdaEWyCjlhGVoqcHZi7PLoBCkH2RVg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=IZm3UiDg; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=13o1iC7+; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="IZm3UiDg"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="13o1iC7+" Date: Tue, 02 Sep 2025 10:36:40 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1756809402; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JNyOF5PQqT2VQk0BzSrAl8hGd1ug46d5AptoepTYYiQ=; b=IZm3UiDgJi81Bc7hTbsxb4fUr6hN0BA/c81AwAZ0OY8TLJH7LPkpIyHmr1+G/DBid4RlIG ccaDERM8GffdxoUIhJKQmTP309bsRa51Xe1dFf6dSfKfEmqjGuHVcudW8r8eXSGPZ3cHeq P1QRDRlxL8S3gVyR+vKBMjNWr/lQRtDEKIOfe9GnsFo/osZdKHx7/V4rFjHwi1lqAU0ELp 6HvwD2zqiZ5huRpeAE1QgOpxr0JS1I3tDr662VxIJKjKiF4K+zeXYzNUN8iu3toPWccDcp cvoYwNBL2/sGq4Nc2phB5LXI3YTE9FAwbsz5oQf+abcwCHtDZsOOfbKJjy96Mw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1756809402; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JNyOF5PQqT2VQk0BzSrAl8hGd1ug46d5AptoepTYYiQ=; b=13o1iC7+JME9mE+kG05EuzUNAO2rwqdmEy+6cwqRxKLx5kww1G21zIK8+9jPA804LYniyh 9YBNl/SLnNAVmZAQ== From: "tip-bot2 for Neeraj Upadhyay" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/apic] x86/apic: Add support to send NMI IPI for Secure AVIC Cc: Kishon Vijay Abraham I , Neeraj Upadhyay , "Borislav Petkov (AMD)" , Tianyu Lan , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250828111213.208933-1-Neeraj.Upadhyay@amd.com> References: <20250828111213.208933-1-Neeraj.Upadhyay@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175680940081.1920.7399410915830560623.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/apic branch of tip: Commit-ID: 9de196f519a505cf104216d6f1d8688570dacca4 Gitweb: https://git.kernel.org/tip/9de196f519a505cf104216d6f1d868857= 0dacca4 Author: Neeraj Upadhyay AuthorDate: Thu, 28 Aug 2025 16:42:13 +05:30 Committer: Borislav Petkov (AMD) CommitterDate: Mon, 01 Sep 2025 12:49:25 +02:00 x86/apic: Add support to send NMI IPI for Secure AVIC Secure AVIC introduces a new field in the APIC backing page "NmiReq" that h= as to be set by the guest to request a NMI IPI through APIC_ICR write. Add support to set NmiReq appropriately to send NMI IPI. Co-developed-by: Kishon Vijay Abraham I Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Neeraj Upadhyay Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Tianyu Lan Link: https://lore.kernel.org/20250828111213.208933-1-Neeraj.Upadhyay@amd.c= om --- arch/x86/kernel/apic/x2apic_savic.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2a= pic_savic.c index bdefe4c..8ed56e8 100644 --- a/arch/x86/kernel/apic/x2apic_savic.c +++ b/arch/x86/kernel/apic/x2apic_savic.c @@ -133,12 +133,15 @@ static inline void self_ipi_reg_write(unsigned int ve= ctor) native_apic_msr_write(APIC_SELF_IPI, vector); } =20 -static void send_ipi_dest(unsigned int cpu, unsigned int vector) +static void send_ipi_dest(unsigned int cpu, unsigned int vector, bool nmi) { - update_vector(cpu, APIC_IRR, vector, true); + if (nmi) + apic_set_reg(per_cpu_ptr(savic_page, cpu), SAVIC_NMI_REQ, 1); + else + update_vector(cpu, APIC_IRR, vector, true); } =20 -static void send_ipi_allbut(unsigned int vector) +static void send_ipi_allbut(unsigned int vector, bool nmi) { unsigned int cpu, src_cpu; =20 @@ -149,14 +152,17 @@ static void send_ipi_allbut(unsigned int vector) for_each_cpu(cpu, cpu_online_mask) { if (cpu =3D=3D src_cpu) continue; - send_ipi_dest(cpu, vector); + send_ipi_dest(cpu, vector, nmi); } } =20 -static inline void self_ipi(unsigned int vector) +static inline void self_ipi(unsigned int vector, bool nmi) { u32 icr_low =3D APIC_SELF_IPI | vector; =20 + if (nmi) + icr_low |=3D APIC_DM_NMI; + native_x2apic_icr_write(icr_low, 0); } =20 @@ -164,22 +170,24 @@ static void savic_icr_write(u32 icr_low, u32 icr_high) { unsigned int dsh, vector; u64 icr_data; + bool nmi; =20 dsh =3D icr_low & APIC_DEST_ALLBUT; vector =3D icr_low & APIC_VECTOR_MASK; + nmi =3D ((icr_low & APIC_DM_FIXED_MASK) =3D=3D APIC_DM_NMI); =20 switch (dsh) { case APIC_DEST_SELF: - self_ipi(vector); + self_ipi(vector, nmi); break; case APIC_DEST_ALLINC: - self_ipi(vector); + self_ipi(vector, nmi); fallthrough; case APIC_DEST_ALLBUT: - send_ipi_allbut(vector); + send_ipi_allbut(vector, nmi); break; default: - send_ipi_dest(icr_high, vector); + send_ipi_dest(icr_high, vector, nmi); break; } =20