From nobody Fri Oct 3 21:53:25 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D3D01FE474; Sun, 24 Aug 2025 10:22:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756030951; cv=none; b=QqEsrbQHaCVBqJjTxLL0/fEyiOn+GdCXuVw/nlFBGYJxWzbLUBQkJlUcPDOSQF0u5HqMiW+0fkyskIpHNGVwyFRbOKlNLyfJ67byZjr11Zf1j7bV6V1RBw/lDg5+hOfYW9EJ0Uag4mNW04AkaMWGs9GqY1JTZWDCLVcWaz22/mU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756030951; c=relaxed/simple; bh=4bjGXTOa+YxPHqvgC1wvnL3997iBtY6RmjEyrIBV/d8=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=CyWFNtL65SeFzBByQzGg97Sa+p+YC+zZprcP2eH1PrDP8eFiY6wWsafAf77Z7F9dCpxEPsmKPjPIBmQnZENWjkF2qS+Ou7DfOk9MCgyfZYqx7uLHPv5tokFLmN1Is+4j9mCUjwreJan0Q8Ud1qb233npQ7Z8/S+gaA2EFm/t0NY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CKvVlc/V; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=3pqPsYw0; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CKvVlc/V"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="3pqPsYw0" Date: Sun, 24 Aug 2025 10:22:26 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1756030948; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d2t+71IMdUZ4X9pCsSi9o7/f8WAjPX8JhoSoEFB0f/4=; b=CKvVlc/VawuYNtbcSb/dLwWOa3t0GGdf5ggt5LhlMIEXsNsluI2WVC+/pQ8Ndrkl1JSHgi rdHdpeBRSsPwiqsetxQOhl+D/oCs+KlLJGwbE6j8zAN2I5/vTlvi/ZhPznQS780qcF1muD fP6UenBpu11QXJ6GlMnKkp5jaZF6j5XTeyek8MY8mrgEyhcCgWCr1nY8JGETNy6XG0FiTr m9ZaBvHq/D7KDsxHWTUaAYwW4Oh6OmDpTYIqcGYk4B4HFlIy+ipu3zSyZ7XY7Kh6KbXgmh YlXw0btqGLLG27ipYsYEcmJgTk+G6ObmCbPuOWOaxtTCQwUR3eiDNRecTmoyJw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1756030948; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d2t+71IMdUZ4X9pCsSi9o7/f8WAjPX8JhoSoEFB0f/4=; b=3pqPsYw0Mk6/lmYnx3u3IJlaQckxVAv718ZKj6V2XAvorHTxKvyi3Mw3xPhU9F2ezIRL2v 2Zk3jNOctO1bumDA== From: "tip-bot2 for Lorenzo Pieralisi" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/urgent] irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives Cc: Jinjie Ruan , Lorenzo Pieralisi , Thomas Gleixner , Zenghui Yu , Marc Zyngier , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250811135001.1333684-1-lpieralisi@kernel.org> References: <20250811135001.1333684-1-lpieralisi@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175603094697.1420.8212077236889894044.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/urgent branch of tip: Commit-ID: 1a2cce5b91eeeac24104cbccd8cd3a4dfbdbaa7a Gitweb: https://git.kernel.org/tip/1a2cce5b91eeeac24104cbccd8cd3a4df= bdbaa7a Author: Lorenzo Pieralisi AuthorDate: Mon, 11 Aug 2025 15:50:01 +02:00 Committer: Thomas Gleixner CommitterDate: Sun, 24 Aug 2025 12:12:53 +02:00 irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives L2 IST table entries are allocated with the kmalloc interface and their physical addresses are programmed in the GIC (either IST base address register or L1 IST table entries) but their virtual addresses are not stored in any kernel data structure because they are not needed at runtime - the L2 IST table entries are managed through system instructions but never dereferenced directly by the driver. This triggers kmemleak false positive reports: unreferenced object 0xffff00080039a000 (size 4096): comm "swapper/0", pid 0, jiffies 4294892296 hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace (crc 0): kmemleak_alloc+0x34/0x40 __kmalloc_noprof+0x320/0x464 gicv5_irs_iste_alloc+0x1a4/0x484 gicv5_irq_lpi_domain_alloc+0xe4/0x194 irq_domain_alloc_irqs_parent+0x78/0xd8 gicv5_irq_ipi_domain_alloc+0x180/0x238 irq_domain_alloc_irqs_locked+0x238/0x7d4 __irq_domain_alloc_irqs+0x88/0x114 gicv5_of_init+0x284/0x37c of_irq_init+0x3b8/0xb18 irqchip_init+0x18/0x40 init_IRQ+0x104/0x164 start_kernel+0x1a4/0x3d4 __primary_switched+0x8c/0x94 Instruct kmemleak to ignore L2 IST table memory allocation virtual addresses to prevent these false positive reports. Reported-by: Jinjie Ruan Signed-off-by: Lorenzo Pieralisi Signed-off-by: Thomas Gleixner Reviewed-by: Jinjie Ruan Reviewed-by: Zenghui Yu Acked-by: Marc Zyngier Link: https://lore.kernel.org/all/20250811135001.1333684-1-lpieralisi@kerne= l.org Closes: https://lore.kernel.org/lkml/cc611dda-d1e4-4793-9bb2-0eaa47277584@h= uawei.com/ --- drivers/irqchip/irq-gic-v5-irs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/irqchip/irq-gic-v5-irs.c b/drivers/irqchip/irq-gic-v5-= irs.c index f845415..ffc9773 100644 --- a/drivers/irqchip/irq-gic-v5-irs.c +++ b/drivers/irqchip/irq-gic-v5-irs.c @@ -5,6 +5,7 @@ =20 #define pr_fmt(fmt) "GICv5 IRS: " fmt =20 +#include #include #include #include @@ -117,6 +118,7 @@ static int __init gicv5_irs_init_ist_linear(struct gicv= 5_irs_chip_data *irs_data kfree(ist); return ret; } + kmemleak_ignore(ist); =20 return 0; } @@ -232,6 +234,7 @@ int gicv5_irs_iste_alloc(const u32 lpi) kfree(l2ist); return ret; } + kmemleak_ignore(l2ist); =20 /* * Make sure we invalidate the cache line pulled before the IRS