From nobody Sat Oct 4 01:41:11 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7686B30DEA0; Thu, 21 Aug 2025 12:46:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755780403; cv=none; b=k+FQwza7Abhr7FgG6HmdzXZMcAiOiNT8j4XwdBgdcAUcTRXoatBfxe21UHWLNUlk70ynCcOnQvhq34FVzn9miWVlnueQUBE4GC/7UVR9HPikaSkTvZz+UqimbKFCfdptnI2JQYOOsP3fdk0cYBsazzHFrCsVZwvlUtty8Xffd/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755780403; c=relaxed/simple; bh=10M73hlg9fKiplCCOeMO1VdipSXEmlPmTibHaldOVvU=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=lMIarp2aaeQp0dqBCr2hlDQECjitGta59zzamUWiaQBMz0PAVtkVj0ZgCbiNFLw6sgebV0baiIUrccmvgpE/bDOJLHUaFHMPwwyKADFcPQmHQa8ZFVW8k5jrTfjW8hsmGRpII44Iuw0OxDCdMDgmjUC5Eo6JjrMzHTO1ZyTZhBA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=XbMVR0h9; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=19/f4//x; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="XbMVR0h9"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="19/f4//x" Date: Thu, 21 Aug 2025 12:46:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1755780399; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VPxH4mtN0R+INd7TpNNEZ4CQVu0UwA0Mkbf470ms+CM=; b=XbMVR0h9RUXx0YLXf4Ni8TQwzmkcBhDtTI+wOTVkuc3lJVOJz64Bo2lHnG73KN0/Qm40G5 6e5NoVkZ9GBY1KghSwV75PPJC2SlmDssuaWhH0hefo9qIfTqMU/aQwQTm3Cw7NSOaBMk0C TmJ5z4DMutpCIJgb34IjsOESO5ClJzQ1JN3j4W71y+VCrsnAtwbi2d8QNOj4lCzksid4KU viAQLc5QNiPygxIva2XmK62UyaN0+eTJHZGaQ4k+qLjxMDE5RbIXIZLu2QWlaBVs3sNpsQ xAMstO0VitBkaTPfoE75KXEZ5lqWhNW160Wnt6NQloREuDBZHwj86HwrLtv7GA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1755780399; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VPxH4mtN0R+INd7TpNNEZ4CQVu0UwA0Mkbf470ms+CM=; b=19/f4//xqdAe3h9UGlOB3MO1q0AdHo8Sz1Kg7WOB/+/R1bg8bU45J66sKzqJzBjiRDzeI5 Mjl6ocsXSOBU+nDA== From: "tip-bot2 for Uros Bizjak" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cleanups] crypto: x86 - Remove CONFIG_AS_VPCLMULQDQ Cc: Uros Bizjak , "Borislav Petkov (AMD)" , Herbert Xu , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250819085855.333380-3-ubizjak@gmail.com> References: <20250819085855.333380-3-ubizjak@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175578039814.1420.6303269539921395888.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cleanups branch of tip: Commit-ID: e084e9f8151f1d37b085317752d36b4fa2fec9b9 Gitweb: https://git.kernel.org/tip/e084e9f8151f1d37b085317752d36b4fa= 2fec9b9 Author: Uros Bizjak AuthorDate: Tue, 19 Aug 2025 10:57:51 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 21 Aug 2025 14:32:41 +02:00 crypto: x86 - Remove CONFIG_AS_VPCLMULQDQ Current minimum required version of binutils is 2.30, which supports VPCLMU= LQDQ instruction mnemonics. Remove check for assembler support of VPCLMULQDQ instructions and all relev= ant macros for conditional compilation. No functional change intended. Signed-off-by: Uros Bizjak Signed-off-by: Borislav Petkov (AMD) Acked-by: Herbert Xu Link: https://lore.kernel.org/20250819085855.333380-3-ubizjak@gmail.com --- arch/x86/Kconfig.assembler | 5 ----- arch/x86/crypto/Makefile | 6 ++---- arch/x86/crypto/aes-ctr-avx-x86_64.S | 2 -- arch/x86/crypto/aes-xts-avx-x86_64.S | 2 -- arch/x86/crypto/aesni-intel_glue.c | 22 +++------------------- 5 files changed, 5 insertions(+), 32 deletions(-) diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler index 8d18084..ea0e9df 100644 --- a/arch/x86/Kconfig.assembler +++ b/arch/x86/Kconfig.assembler @@ -6,11 +6,6 @@ config AS_AVX512 help Supported by binutils >=3D 2.25 and LLVM integrated assembler =20 -config AS_VPCLMULQDQ - def_bool $(as-instr,vpclmulqdq \$0x10$(comma)%ymm0$(comma)%ymm1$(comma)%y= mm2) - help - Supported by binutils >=3D 2.30 and LLVM integrated assembler - config AS_WRUSS def_bool $(as-instr64,wrussq %rax$(comma)(%rbx)) help diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile index 50f1c04..419252d 100644 --- a/arch/x86/crypto/Makefile +++ b/arch/x86/crypto/Makefile @@ -46,10 +46,8 @@ obj-$(CONFIG_CRYPTO_AES_NI_INTEL) +=3D aesni-intel.o aesni-intel-y :=3D aesni-intel_asm.o aesni-intel_glue.o aesni-intel-$(CONFIG_64BIT) +=3D aes-ctr-avx-x86_64.o \ aes-gcm-aesni-x86_64.o \ - aes-xts-avx-x86_64.o -ifeq ($(CONFIG_AS_VPCLMULQDQ),y) -aesni-intel-$(CONFIG_64BIT) +=3D aes-gcm-avx10-x86_64.o -endif + aes-xts-avx-x86_64.o \ + aes-gcm-avx10-x86_64.o =20 obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) +=3D ghash-clmulni-intel.o ghash-clmulni-intel-y :=3D ghash-clmulni-intel_asm.o ghash-clmulni-intel_g= lue.o diff --git a/arch/x86/crypto/aes-ctr-avx-x86_64.S b/arch/x86/crypto/aes-ctr= -avx-x86_64.S index ec957b2..2745918 100644 --- a/arch/x86/crypto/aes-ctr-avx-x86_64.S +++ b/arch/x86/crypto/aes-ctr-avx-x86_64.S @@ -552,7 +552,6 @@ SYM_TYPED_FUNC_START(aes_xctr_crypt_aesni_avx) _aes_ctr_crypt 1 SYM_FUNC_END(aes_xctr_crypt_aesni_avx) =20 -#if defined(CONFIG_AS_VPCLMULQDQ) .set VL, 32 .set USE_AVX512, 0 SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx2) @@ -570,4 +569,3 @@ SYM_FUNC_END(aes_ctr64_crypt_vaes_avx512) SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx512) _aes_ctr_crypt 1 SYM_FUNC_END(aes_xctr_crypt_vaes_avx512) -#endif // CONFIG_AS_VPCLMULQDQ diff --git a/arch/x86/crypto/aes-xts-avx-x86_64.S b/arch/x86/crypto/aes-xts= -avx-x86_64.S index e44e568..a30753a 100644 --- a/arch/x86/crypto/aes-xts-avx-x86_64.S +++ b/arch/x86/crypto/aes-xts-avx-x86_64.S @@ -886,7 +886,6 @@ SYM_TYPED_FUNC_START(aes_xts_decrypt_aesni_avx) _aes_xts_crypt 0 SYM_FUNC_END(aes_xts_decrypt_aesni_avx) =20 -#if defined(CONFIG_AS_VPCLMULQDQ) .set VL, 32 .set USE_AVX512, 0 SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx2) @@ -904,4 +903,3 @@ SYM_FUNC_END(aes_xts_encrypt_vaes_avx512) SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx512) _aes_xts_crypt 0 SYM_FUNC_END(aes_xts_decrypt_vaes_avx512) -#endif /* CONFIG_AS_VPCLMULQDQ */ diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-int= el_glue.c index d5a2f5b..d953ac4 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c @@ -828,10 +828,8 @@ static struct skcipher_alg skcipher_algs_##suffix[] = =3D {{ \ }} =20 DEFINE_AVX_SKCIPHER_ALGS(aesni_avx, "aesni-avx", 500); -#if defined(CONFIG_AS_VPCLMULQDQ) DEFINE_AVX_SKCIPHER_ALGS(vaes_avx2, "vaes-avx2", 600); DEFINE_AVX_SKCIPHER_ALGS(vaes_avx512, "vaes-avx512", 800); -#endif =20 /* The common part of the x86_64 AES-GCM key struct */ struct aes_gcm_key { @@ -912,17 +910,8 @@ struct aes_gcm_key_avx10 { #define FLAG_RFC4106 BIT(0) #define FLAG_ENC BIT(1) #define FLAG_AVX BIT(2) -#if defined(CONFIG_AS_VPCLMULQDQ) -# define FLAG_AVX10_256 BIT(3) -# define FLAG_AVX10_512 BIT(4) -#else - /* - * This should cause all calls to the AVX10 assembly functions to be - * optimized out, avoiding the need to ifdef each call individually. - */ -# define FLAG_AVX10_256 0 -# define FLAG_AVX10_512 0 -#endif +#define FLAG_AVX10_256 BIT(3) +#define FLAG_AVX10_512 BIT(4) =20 static inline struct aes_gcm_key * aes_gcm_key_get(struct crypto_aead *tfm, int flags) @@ -1519,7 +1508,6 @@ DEFINE_GCM_ALGS(aesni_avx, FLAG_AVX, "generic-gcm-aesni-avx", "rfc4106-gcm-aesni-avx", AES_GCM_KEY_AESNI_SIZE, 500); =20 -#if defined(CONFIG_AS_VPCLMULQDQ) /* aes_gcm_algs_vaes_avx10_256 */ DEFINE_GCM_ALGS(vaes_avx10_256, FLAG_AVX10_256, "generic-gcm-vaes-avx10_256", "rfc4106-gcm-vaes-avx10_256", @@ -1529,7 +1517,6 @@ DEFINE_GCM_ALGS(vaes_avx10_256, FLAG_AVX10_256, DEFINE_GCM_ALGS(vaes_avx10_512, FLAG_AVX10_512, "generic-gcm-vaes-avx10_512", "rfc4106-gcm-vaes-avx10_512", AES_GCM_KEY_AVX10_SIZE, 800); -#endif /* CONFIG_AS_VPCLMULQDQ */ =20 static int __init register_avx_algs(void) { @@ -1551,7 +1538,6 @@ static int __init register_avx_algs(void) * Similarly, the assembler support was added at about the same time. * For simplicity, just always check for VAES and VPCLMULQDQ together. */ -#if defined(CONFIG_AS_VPCLMULQDQ) if (!boot_cpu_has(X86_FEATURE_AVX2) || !boot_cpu_has(X86_FEATURE_VAES) || !boot_cpu_has(X86_FEATURE_VPCLMULQDQ) || @@ -1592,7 +1578,7 @@ static int __init register_avx_algs(void) ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512)); if (err) return err; -#endif /* CONFIG_AS_VPCLMULQDQ */ + return 0; } =20 @@ -1607,12 +1593,10 @@ static void unregister_avx_algs(void) { unregister_skciphers(skcipher_algs_aesni_avx); unregister_aeads(aes_gcm_algs_aesni_avx); -#if defined(CONFIG_AS_VPCLMULQDQ) unregister_skciphers(skcipher_algs_vaes_avx2); unregister_skciphers(skcipher_algs_vaes_avx512); unregister_aeads(aes_gcm_algs_vaes_avx10_256); unregister_aeads(aes_gcm_algs_vaes_avx10_512); -#endif } #else /* CONFIG_X86_64 */ static struct aead_alg aes_gcm_algs_aesni[0];