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Wed, 23 Jul 2025 00:45:06 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Alexei Lazar Subject: [PATCH net 1/3] net/mlx5e: Clear Read-Only port buffer size in PBMC before update Date: Wed, 23 Jul 2025 10:44:30 +0300 Message-ID: <1753256672-337784-2-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1753256672-337784-1-git-send-email-tariqt@nvidia.com> References: <1753256672-337784-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE1A:EE_|SA1PR12MB7441:EE_ X-MS-Office365-Filtering-Correlation-Id: 6d130dd3-2218-4da5-5ce8-08ddc9bce84c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ePY94aPSNf4bYR36sBcDE+UZahNfRVjKnkvCMVRxI5WbPmwPLMGvtBvS7rm9?= =?us-ascii?Q?vc1HmiFzYxPya7m7ZtablLXY5pCDwWfNnBo0K05SnKlYVqOziUbWF12LFWqv?= =?us-ascii?Q?exDRtckjs56luyCbULvDBpeYaHftc6NQDfAqyVXs4lqgz+sSLDJnfOpScoDA?= =?us-ascii?Q?b0eLq49Tj6cb+Qw9QTom+DiL5C8LJadWBuwkNgRf5TifB6oScZ96Z3tC0aQQ?= =?us-ascii?Q?cfi6sYCO41i3CT5qyWyj2deFeV9VZ0nO47Q186BMvG86BFKeQLBsVcIlxC9v?= =?us-ascii?Q?TiEe639kcwe9DM8SRq9nY9a4+dwFIAx2NxbHXGbNdNV0oti87XR1EWhLbBI7?= =?us-ascii?Q?9EBYCYN3Ph+PtH7PRjDikbTdB6cr03+pmiCcb5tSIA9tUjzXIHT82+sEF0R3?= =?us-ascii?Q?APx0oVEMZNiJ/nuUoeJxtBJM1rv3Jx6HxT7cU2rdnu1v9SNtzkmo+2PjXvKs?= =?us-ascii?Q?Q6KpOwfip+ZFY+nIa/Bnj4rnbnNunsMCX6xEZWzGMPUtkC2CnrGZZMPDDl7Q?= =?us-ascii?Q?u3SCq2GI154iLyuM4x6aqh6slO0iWZ9DO+gJ1cazLuZQ2iyFDlHCONhK04KF?= =?us-ascii?Q?xYjtmCQEe+QHqX3atUcETHpDq06QuIknDr0Q2rzr+/pf7gWlINJL5I4SOwC9?= =?us-ascii?Q?v+3IbX/IjIOSEdcWo9GgD5KLtynMDFQBKWH2xswSEC4PP7yGbsZCYW08x0Sy?= =?us-ascii?Q?ZF3NLjvwAMCsGsIfmcxxV6zhGLggd4bvER31Mlz1qbKzzL+e7MyyX82clEvI?= =?us-ascii?Q?a/J7F7mq1jxwxs/AsS9znqCDj/KGi72a0VivcMm2L3kSbdhY0xpVbPbAwYMd?= =?us-ascii?Q?VEZ4RUGFh2d8fm1kqCPj/688CUwdIW7eNnx7rkqjtlt5Elzq55YciaL1Wsbp?= =?us-ascii?Q?mur/sARzP0inOXNHlhyXTOIFU19B8dQBvAu77eSfYBOuQn9OCnzTVZSXyPrj?= =?us-ascii?Q?kV87gbnvl3XsVyiiUbc3eNr7VcR4rWUmBfPbbawP6bW4yyTKha5Du8bkUjxI?= =?us-ascii?Q?NFYVj1EmDym65MwAsDBtCiOrHIq8kotObfQ7clrtGhDqy9mfRnAJqKD0/+rr?= =?us-ascii?Q?PLPMmSj6H+W3iCWRDIzP58UGL0hQr2FdgfRV4HlbtzqOgPDfxgs3nZm2bnlg?= =?us-ascii?Q?sjnoehEdsNi+j6LRF7JxN2ObbdmLqOY0fgXDA1WpKSNzavxq6+fQ3KSiVmB3?= =?us-ascii?Q?ZIxBGM8UW9R+xSNELOzplly+W9Nzg/ThT6fkEkLcsYBNWHUoWq2/JWBh9c8f?= =?us-ascii?Q?JMdTkwzXvhzo/yFL34SPj4ojid6E9dJr3kbjBoLck8qiO9DgrETEzxdTUH1d?= =?us-ascii?Q?9uHoagUkxfPsK5GV+kUI3YwCh9MNnYgRk0bLfCPTsIzxUKPM3kHoioU37g5m?= =?us-ascii?Q?Ub+/1ToCc+nCc0dj4AftGsxGv681SxabduCOzzgMG/+loSKxAElBFNix6Xjf?= =?us-ascii?Q?HRyLSmNT+gwy/mlOrxsxhqJqJQsaYdv2gtagaaVd03VnZvMoUhEUFj0faRlt?= =?us-ascii?Q?GK8dSFMyn3VRCjZXuKilPq9nPDICV6iiFCaH?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2025 07:45:34.3401 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6d130dd3-2218-4da5-5ce8-08ddc9bce84c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE1A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7441 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Alexei Lazar When updating the PBMC register, we read its current value, modify desired fields, then write it back. The port_buffer_size field within PBMC is Read-Only (RO). If this RO field contains a non-zero value when read, attempting to write it back will cause the entire PBMC register update to fail. This commit ensures port_buffer_size is explicitly cleared to zero after reading the PBMC register but before writing back the modified value. This allows updates to other fields in the PBMC register to succeed. Fixes: 0696d60853d5 ("net/mlx5e: Receive buffer configuration") Signed-off-by: Alexei Lazar Reviewed-by: Yael Chemla Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c b/dri= vers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c index 8e25f4ef5ccc..5ae787656a7c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c @@ -331,6 +331,9 @@ static int port_set_buffer(struct mlx5e_priv *priv, if (err) goto out; =20 + /* RO bits should be set to 0 on write */ + MLX5_SET(pbmc_reg, in, port_buffer_size, 0); + err =3D mlx5e_port_set_pbmc(mdev, in); out: kfree(in); --=20 2.31.1 From nobody Mon Oct 6 08:24:25 2025 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2042.outbound.protection.outlook.com [40.107.236.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5FB427875C; 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However, the state might have been freed by the time of this lookup. Currently, if the state is not found, only a counter is incremented. The secpath (sp) extension on the skb is not removed, resulting in sp->len becoming 0. Subsequently, functions like __xfrm_policy_check() attempt to access fields such as xfrm_input_state(skb)->xso.type (which dereferences sp->xvec[sp->len - 1]) without first validating sp->len. This leads to a crash when dereferencing an invalid state pointer. This patch prevents the crash by explicitly removing the secpath extension from the skb if the xfrm state is not found after hardware decryption. This ensures downstream functions do not operate on a zero-length secpath. BUG: unable to handle page fault for address: ffffffff000002c8 #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 282e067 P4D 282e067 PUD 0 Oops: Oops: 0000 [#1] SMP CPU: 12 UID: 0 PID: 0 Comm: swapper/12 Not tainted 6.15.0-rc7_for_upstream= _min_debug_2025_05_27_22_44 #1 NONE Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21= b5a4aeb02-prebuilt.qemu.org 04/01/2014 RIP: 0010:__xfrm_policy_check+0x61a/0xa30 Code: b6 77 7f 83 e6 02 74 14 4d 8b af d8 00 00 00 41 0f b6 45 05 c1 e0 03= 48 98 49 01 c5 41 8b 45 00 83 e8 01 48 98 49 8b 44 c5 10 <0f> b6 80 c8 02 = 00 00 83 e0 0c 3c 04 0f 84 0c 02 00 00 31 ff 80 fa RSP: 0018:ffff88885fb04918 EFLAGS: 00010297 RAX: ffffffff00000000 RBX: 0000000000000002 RCX: 0000000000000000 RDX: 0000000000000002 RSI: 0000000000000002 RDI: 0000000000000000 RBP: ffffffff8311af80 R08: 0000000000000020 R09: 00000000c2eda353 R10: ffff88812be2bbc8 R11: 000000001faab533 R12: ffff88885fb049c8 R13: ffff88812be2bbc8 R14: 0000000000000000 R15: ffff88811896ae00 FS: 0000000000000000(0000) GS:ffff8888dca82000(0000) knlGS:00000000000000= 00 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ffffffff000002c8 CR3: 0000000243050002 CR4: 0000000000372eb0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: ? try_to_wake_up+0x108/0x4c0 ? udp4_lib_lookup2+0xbe/0x150 ? udp_lib_lport_inuse+0x100/0x100 ? __udp4_lib_lookup+0x2b0/0x410 __xfrm_policy_check2.constprop.0+0x11e/0x130 udp_queue_rcv_one_skb+0x1d/0x530 udp_unicast_rcv_skb+0x76/0x90 __udp4_lib_rcv+0xa64/0xe90 ip_protocol_deliver_rcu+0x20/0x130 ip_local_deliver_finish+0x75/0xa0 ip_local_deliver+0xc1/0xd0 ? ip_protocol_deliver_rcu+0x130/0x130 ip_sublist_rcv+0x1f9/0x240 ? ip_rcv_finish_core+0x430/0x430 ip_list_rcv+0xfc/0x130 __netif_receive_skb_list_core+0x181/0x1e0 netif_receive_skb_list_internal+0x200/0x360 ? mlx5e_build_rx_skb+0x1bc/0xda0 [mlx5_core] gro_receive_skb+0xfd/0x210 mlx5e_handle_rx_cqe_mpwrq+0x141/0x280 [mlx5_core] mlx5e_poll_rx_cq+0xcc/0x8e0 [mlx5_core] ? mlx5e_handle_rx_dim+0x91/0xd0 [mlx5_core] mlx5e_napi_poll+0x114/0xab0 [mlx5_core] __napi_poll+0x25/0x170 net_rx_action+0x32d/0x3a0 ? mlx5_eq_comp_int+0x8d/0x280 [mlx5_core] ? notifier_call_chain+0x33/0xa0 handle_softirqs+0xda/0x250 irq_exit_rcu+0x6d/0xc0 common_interrupt+0x81/0xa0 Fixes: b2ac7541e377 ("net/mlx5e: IPsec: Add Connect-X IPsec Rx data path of= fload") Signed-off-by: Jianbo Liu Reviewed-by: Dragos Tatulea Reviewed-by: Yael Chemla Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c = b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c index 727fa7c18523..6056106edcc6 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c @@ -327,6 +327,10 @@ void mlx5e_ipsec_offload_handle_rx_skb(struct net_devi= ce *netdev, if (unlikely(!sa_entry)) { rcu_read_unlock(); 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Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , , , , Gal Pressman , Shahar Shitrit Subject: [PATCH net 3/3] net/mlx5e: Fix potential deadlock by deferring RX timeout recovery Date: Wed, 23 Jul 2025 10:44:32 +0300 Message-ID: <1753256672-337784-4-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1753256672-337784-1-git-send-email-tariqt@nvidia.com> References: <1753256672-337784-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE16:EE_|IA1PR12MB9738:EE_ X-MS-Office365-Filtering-Correlation-Id: 81eff920-da51-4406-16a2-08ddc9bced27 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?tE/grJfRn9pEx8zvhhkTmgR1hMi4mLDwE6ooamkCzei20Qi/IaDcyVjIg1eZ?= =?us-ascii?Q?+gzVxTGqKw8i21TI/hgcEPLAC9O40FRhI9+NUOX9HDj+mnSXl/7AXrZy6o67?= =?us-ascii?Q?px7rfqHJHO0U0hhkY/a1lT+5qLNjnsgYk5uT2CBZKWqFQJTN2q+6HE2qqfZo?= =?us-ascii?Q?1eicU2tccOy0kIQDJnomR81XJLwWmTVCGGeytpmGtE0FSIWhnQSweIRwJlJK?= =?us-ascii?Q?Yv1urwnEQB+G0bSVfwrDCgOCnpF5gielzDwq/xHOTDt50FTS99AZSnSppueQ?= =?us-ascii?Q?1YAUCLt+0bhVtrjzZx0e+KapMLa9bpeugFyWJ/6W4pewGvzwTr3oUHBMunwp?= =?us-ascii?Q?GhBY2hnZOe0aHenXAdM6T7zKk7UvR85gU6aFQpMJDxUGH36scMET288I7z36?= =?us-ascii?Q?Q7qqae9Y5xRYlQyyRVoKnAQMFjz3y6MQqbNQj8Kxnmz87MfvZVbGdWkp/aXp?= =?us-ascii?Q?kZvfW1b3qceuRccMcwJWvXpRlJWvxy1THTYYhUodiqYrDXHst4fYoyDqkNaL?= =?us-ascii?Q?g6H07hl5+dtRay1c8wkqxT3GvzalW1V5dZjkIvQyFpjrD0x937WyRXcGPHxI?= =?us-ascii?Q?/ySQ0zkSqZ5PyFjD2TjNWNNwyZ7Y+rXTpmekGOMZavtWnNxvmLsYvjUtFvRd?= =?us-ascii?Q?vb8b7aFUHgyZTaFuc6ifnNXOrPYRmIv0teNGz3HaS3TaqZoQPvA3i610uy5M?= =?us-ascii?Q?O0mAEFEwRMDbVWCgeL7MYABRLdHm/917hD3Wpk6N1WkMSjLMxS+tD5KviTC2?= =?us-ascii?Q?lEWrlxq4yUcMNI75CFIhGZSchKkY75mDsADthvJhLusp/WvA3v9QgpPYanJn?= =?us-ascii?Q?/uYlp3uqQ40pwdIDRALWVOJfSEsEGqgkWtkYXoy2PFHI/75xH6V0eKyMMxh1?= =?us-ascii?Q?Ro8tE5n+q5H3r4LpxxN6Ew2s2G0pECoZaiQ9x1kLRr70IAV6HIifPRBN+3mQ?= =?us-ascii?Q?pRMK3Im7H67h2ccqFIr2cMt0yqRTd7G/RxwqxA0IED6trQF/nJykzl7CBc02?= =?us-ascii?Q?IGHARLaqyijjlIYHZ4J46DCnNk6boSQL5GYMPMGjm6aQCRtx/dhflT79Ics/?= =?us-ascii?Q?rAZUvUP/lWexz5ah/H5A4ALrrz0SNNydJRAA1T5+K0qTH/5ba1UDvodsZGUu?= =?us-ascii?Q?dPp/hTFvyeWWzR4Y8TvJvWb83YlFye9uWDBu3/Jq4tWDyZp3/4YocFwuhQPM?= =?us-ascii?Q?JD43zG6fwONV4TNBZXPmguN5MIbzoL++/H8X0WVg7rIwIVjyv1b+Amz6loOv?= =?us-ascii?Q?WfxpCno6xzh0/idakJpdTl64BjhP9fyS9rkEKnODMk4xtVcRgNZa/QP1CTYE?= =?us-ascii?Q?Hj+NiRxJ8qMVFqdPGtSZafC2HZqhHt5QWbqHbLK+ZJZpRZRTT7KsKoHN8IIR?= =?us-ascii?Q?drRPyifwgbRVo7IB9tS6vb4SXL3UKs4fvwDE/oseAXjViXvdht/AY5CFQJH9?= =?us-ascii?Q?oGlYJtz94hlLi6HDaOTXf9+SPB12BPFWdrlyOiX9CwWsx/EzQ+1yhHX1NrXk?= =?us-ascii?Q?u71dTkFZ/K2uOSH+yp0pPog0bDtqzjDM77rR?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2025 07:45:42.5509 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81eff920-da51-4406-16a2-08ddc9bced27 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE16.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB9738 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shahar Shitrit mlx5e_reporter_rx_timeout() is currently invoked synchronously in the driver's open error flow. This causes the thread holding priv->state_lock to attempt acquiring the devlink lock, which can result in a circular dependency with other devlink operations. For example: - Devlink health diagnose flow: - __devlink_nl_pre_doit() acquires the devlink lock. - devlink_nl_health_reporter_diagnose_doit() invokes the driver's diagnose callback. - mlx5e_rx_reporter_diagnose() then attempts to acquire priv->state_lock. - Driver open flow: - mlx5e_open() acquires priv->state_lock. - If an error occurs, devlink_health_reporter may be called, attempting to acquire the devlink lock. To prevent this circular locking scenario, defer the RX timeout recovery by scheduling it via a workqueue. This ensures that the recovery work acquires locks in a consistent order: first the devlink lock, then priv->state_lock. Additionally, make the recovery work acquire the netdev instance lock to safely synchronize with the open/close channel flows, similar to mlx5e_tx_timeout_work. Repeatedly attempt to acquire the netdev instance lock until it is taken or the target RQ is no longer active, as indicated by the MLX5E_STATE_CHANNELS_ACTIVE bit. Fixes: 32c57fb26863 ("net/mlx5e: Report and recover from rx timeout") Signed-off-by: Shahar Shitrit Reviewed-by: Cosmin Ratiu Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 + .../mellanox/mlx5/core/en/reporter_rx.c | 7 +++++ .../net/ethernet/mellanox/mlx5/core/en_main.c | 26 ++++++++++++++++++- 3 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/eth= ernet/mellanox/mlx5/core/en.h index 5b0d03b3efe8..48bcd6813aff 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -728,6 +728,7 @@ struct mlx5e_rq { struct xsk_buff_pool *xsk_pool; =20 struct work_struct recover_work; + struct work_struct rx_timeout_work; =20 /* control */ struct mlx5_wq_ctrl wq_ctrl; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c b/dri= vers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c index e75759533ae0..16c44d628eda 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c @@ -170,16 +170,23 @@ static int mlx5e_rx_reporter_err_rq_cqe_recover(void = *ctx) static int mlx5e_rx_reporter_timeout_recover(void *ctx) { struct mlx5_eq_comp *eq; + struct mlx5e_priv *priv; struct mlx5e_rq *rq; int err; =20 rq =3D ctx; + priv =3D rq->priv; + + mutex_lock(&priv->state_lock); + eq =3D rq->cq.mcq.eq; =20 err =3D mlx5e_health_channel_eq_recover(rq->netdev, eq, rq->cq.ch_stats); if (err && rq->icosq) clear_bit(MLX5E_SQ_STATE_ENABLED, &rq->icosq->state); =20 + mutex_unlock(&priv->state_lock); + return err; } =20 diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/ne= t/ethernet/mellanox/mlx5/core/en_main.c index ea822c69d137..16d818943487 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -707,6 +707,27 @@ static void mlx5e_rq_err_cqe_work(struct work_struct *= recover_work) mlx5e_reporter_rq_cqe_err(rq); } =20 +static void mlx5e_rq_timeout_work(struct work_struct *timeout_work) +{ + struct mlx5e_rq *rq =3D container_of(timeout_work, + struct mlx5e_rq, + rx_timeout_work); + + /* Acquire netdev instance lock to synchronize with channel close and + * reopen flows. Either successfully obtain the lock, or detect that + * channels are closing for another reason, making this work no longer + * necessary. + */ + while (!netdev_trylock(rq->netdev)) { + if (!test_bit(MLX5E_STATE_CHANNELS_ACTIVE, &rq->priv->state)) + return; + msleep(20); + } + + mlx5e_reporter_rx_timeout(rq); + netdev_unlock(rq->netdev); +} + static int mlx5e_alloc_mpwqe_rq_drop_page(struct mlx5e_rq *rq) { rq->wqe_overflow.page =3D alloc_page(GFP_KERNEL); @@ -830,6 +851,7 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params, =20 rqp->wq.db_numa_node =3D node; INIT_WORK(&rq->recover_work, mlx5e_rq_err_cqe_work); + INIT_WORK(&rq->rx_timeout_work, mlx5e_rq_timeout_work); =20 if (params->xdp_prog) bpf_prog_inc(params->xdp_prog); @@ -1204,7 +1226,8 @@ int mlx5e_wait_for_min_rx_wqes(struct mlx5e_rq *rq, i= nt wait_time) netdev_warn(rq->netdev, "Failed to get min RX wqes on Channel[%d] RQN[0x%= x] wq cur_sz(%d) min_rx_wqes(%d)\n", rq->ix, rq->rqn, mlx5e_rqwq_get_cur_sz(rq), min_wqes); =20 - mlx5e_reporter_rx_timeout(rq); + queue_work(rq->priv->wq, &rq->rx_timeout_work); + return -ETIMEDOUT; } =20 @@ -1375,6 +1398,7 @@ void mlx5e_close_rq(struct mlx5e_rq *rq) if (rq->dim) cancel_work_sync(&rq->dim->work); cancel_work_sync(&rq->recover_work); + cancel_work_sync(&rq->rx_timeout_work); mlx5e_destroy_rq(rq); mlx5e_free_rx_descs(rq); mlx5e_free_rq(rq); --=20 2.31.1