From nobody Tue Oct 7 13:23:03 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 473CB2D2380; Wed, 9 Jul 2025 15:50:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752076235; cv=none; b=OXdflMrjnMtIcoEw0TZXRigcTL0GD/a4N2GEAJOmWKK2rOMYtIOd11+u5M7cGp/affEAMHqi1tqDwnyDJxb1maA8gIheBbvspS+uHcqDTCV5GpRmPj3JRSaaFkAlG8xMQnwAs6RXMPksD590BmZwdTE2aY/B3C0dE3EZDcdc6PM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752076235; c=relaxed/simple; bh=Wa46wRSbe8eRRlNEV30UC5rIJFEzqZlhrpSHEe/imCY=; h=Date:From:To:Subject:Cc:MIME-Version:Message-ID:Content-Type; b=qXSkCe8VEeBbTGloNfbZzj3ieg11wlgFUdFl0c5GaQx9a7aWMxypkfglyT1Rx40Q2QF4J/ztFCPLxwtQVnw25v4SeABHOCKicjhQ7DdTxjJ1IPgNtxF6Yuai7pDearZhhDJBdSqhy3A2jRAXCUNyxqf95KsOiJEvPMovTTU6syc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=zJpgOccP; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=i9bmBFfJ; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="zJpgOccP"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="i9bmBFfJ" Date: Wed, 09 Jul 2025 15:50:30 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1752076232; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=mBTpuXAjRCs1WKfYQc7SUYqpORihIvtnyJbuUa7SMV4=; b=zJpgOccPPzhYfrOrQa+oX23PRGg5gLILIxOU3e9NKSnFuIzF8LDmMw8DWHFCPJaoo1v6Q9 eKAcO+oA8M3Dy7NVfxm5Ua3hSNt1JB5FH4Vi1Z9AeZNuZr2zTgp1qnfqrpFA6p8RKsNpE5 22uMNNtMQb64QLqJBorKMh3yS3yTCB9C7WSXxTSneEH8KP3vbYN5Ca+Rb7BNO6px7qeSMF 0UA1t69jWE/V6zW3P1pR37gk3sbKsp1o9xkT9ig7hjA9sHDXLsEccyEWA2oobDi9DN/RPZ nQLIkVCaFW1yvjZnAwbDH2MWKlTTSx+BTT25PXHRhkWIOPDfa7RIYuFcy5UpZg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1752076232; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=mBTpuXAjRCs1WKfYQc7SUYqpORihIvtnyJbuUa7SMV4=; b=i9bmBFfJxezijEfWqywddNgkA6WcoSECawV24332Q7BASQtanfn5snLg/1jFQ8NKTiG7ar 0VaDFZyuaOm6aZAA== From: "tip-bot2 for Jann Horn" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/mm: Disable hugetlb page table sharing on 32-bit Cc: Vitaly Chikunov , Dave Hansen , Jann Horn , Dave Hansen , Oscar Salvador , David Hildenbrand , stable@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175207623080.406.17185038526436313265.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 76303ee8d54bff6d9a6d55997acd88a6c2ba63cf Gitweb: https://git.kernel.org/tip/76303ee8d54bff6d9a6d55997acd88a6c= 2ba63cf Author: Jann Horn AuthorDate: Wed, 02 Jul 2025 10:32:04 +02:00 Committer: Dave Hansen CommitterDate: Wed, 09 Jul 2025 07:46:36 -07:00 x86/mm: Disable hugetlb page table sharing on 32-bit Only select ARCH_WANT_HUGE_PMD_SHARE on 64-bit x86. Page table sharing requires at least three levels because it involves shared references to PMD tables; 32-bit x86 has either two-level paging (without PAE) or three-level paging (with PAE), but even with three-level paging, having a dedicated PGD entry for hugetlb is only barely possible (because the PGD only has four entries), and it seems unlikely anyone's actually using PMD sharing on 32-bit. Having ARCH_WANT_HUGE_PMD_SHARE enabled on non-PAE 32-bit X86 (which has 2-level paging) became particularly problematic after commit 59d9094df3d7 ("mm: hugetlb: independent PMD page table shared count"), since that changes `struct ptdesc` such that the `pt_mm` (for PGDs) and the `pt_share_count` (for PMDs) share the same union storage - and with 2-level paging, PMDs are PGDs. (For comparison, arm64 also gates ARCH_WANT_HUGE_PMD_SHARE on the configuration of page tables such that it is never enabled with 2-level paging.) Closes: https://lore.kernel.org/r/srhpjxlqfna67blvma5frmy3aa@altlinux.org Fixes: cfe28c5d63d8 ("x86: mm: Remove x86 version of huge_pmd_share.") Reported-by: Vitaly Chikunov Suggested-by: Dave Hansen Signed-off-by: Jann Horn Signed-off-by: Dave Hansen Acked-by: Oscar Salvador Acked-by: David Hildenbrand Tested-by: Vitaly Chikunov Cc:stable@vger.kernel.org Link: https://lore.kernel.org/all/20250702-x86-2level-hugetlb-v2-1-1a98096e= df92%40google.com --- arch/x86/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 71019b3..4e0fe68 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -147,7 +147,7 @@ config X86 select ARCH_WANTS_DYNAMIC_TASK_STRUCT select ARCH_WANTS_NO_INSTR select ARCH_WANT_GENERAL_HUGETLB - select ARCH_WANT_HUGE_PMD_SHARE + select ARCH_WANT_HUGE_PMD_SHARE if X86_64 select ARCH_WANT_LD_ORPHAN_WARN select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64