From nobody Tue Oct 7 16:00:32 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D95A2EAD1E for ; Tue, 8 Jul 2025 18:20:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751998847; cv=none; b=gBEkchWD58BrRvtdIS1J945p5WIaCykpOmSRhXZZpU6401XuZ5FAY1SPZZ3VIzaxxd8LsUQ5p3klf44q4KEjBFX9EWlTxv4xhSBxLMyo/6SjVEscBBJ22tv11xtwc48gLa3bbbu7kBBZyD2VZ2fldrlepV1qrF8PYmP9KioQVLc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751998847; c=relaxed/simple; bh=rH07ztBIf0lF58D3rpfPiknNRf/tg1m2eC4N7SxVm4Y=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=DsIAAslC00F7aar/T+7UiC5vnPWU1PuJKmFGKqDrKMMSbZd6ObMmANumOYTVE7nVXok3eIGMUDws+0f4lVq2Wij8cVPJXOY6pZJ3+7uUKOErQo0cAkbS01pU/D2jIYbe5QNXjBA/wdZTrMIPxPw+Cr8L286Ie+1c+4vvy1zcnfs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=d2RuX/cy; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Yyje4MU4; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="d2RuX/cy"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Yyje4MU4" Date: Tue, 08 Jul 2025 18:20:43 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1751998844; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YBZBa/gZ0nARmdGGxicp2N22KN+noykdbBzKiYQ6DZA=; b=d2RuX/cy1dagawTb/ceyI4keHtUuD9PyxXMEQV7BE4oOda0dLbeoVaUwTcyZFkr80g2yNz ccBJKOzNTatGoMkpuA2445ZD0MEPCcObQuNj1g8AYihgN2XVL2FBPDoVJzCdZiMHLaonPw ZM5uwZWVXtIUcVNQY9cUFhyTJPY6Imf8nDAW7rSq4nyD5A0Tgc35hdAEwe/ZaC1SaDAiOb 8gyAlrAMA/DHIuC61WVMhB6vYzP7K2eJmq1TSsrMefLJtrpkWFTpb9xIVD/XQWXxLNbyqd nNSSPVXctlujzy+Mfi9x0Jn1CRDASqbSkKxZTYUCQMqzu+8bSeIIZfJfvilv1A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1751998844; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YBZBa/gZ0nARmdGGxicp2N22KN+noykdbBzKiYQ6DZA=; b=Yyje4MU46byza/6bNrsLPEczXwMFMxmdgfI2UWz5wEj4yzzwIOsRwQT9aBiGhits89/u9i M999U/hsxiSBWpCw== From: "irqchip-bot for Lorenzo Pieralisi" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] arm64/sysreg: Add ICC_PPI_PRIORITY_EL1 Cc: Lorenzo Pieralisi , Jonathan Cameron , Marc Zyngier , Will Deacon , Catalin Marinas , tglx@linutronix.de In-Reply-To: <20250703-gicv5-host-v7-3-12e71f1b3528@kernel.org> References: <20250703-gicv5-host-v7-3-12e71f1b3528@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175199884359.406.4174620902443145727.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/irqchip-next branch of ir= qchip: Commit-ID: 1bd7238dc705f07dea14040a59378e4b1be7164a Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-plat= forms/1bd7238dc705f07dea14040a59378e4b1be7164a Author: Lorenzo Pieralisi AuthorDate: Thu, 03 Jul 2025 12:24:53 +02:00 Committer: Marc Zyngier CommitterDate: Tue, 08 Jul 2025 18:35:50 +01:00 arm64/sysreg: Add ICC_PPI_PRIORITY_EL1 Add ICC_PPI_PRIORITY_EL1 sysreg description. Signed-off-by: Lorenzo Pieralisi Reviewed-by: Jonathan Cameron Reviewed-by: Marc Zyngier Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier Acked-by: Catalin Marinas Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-3-12e71f1b3528@kerne= l.org Signed-off-by: Marc Zyngier --- arch/arm64/tools/sysreg | 83 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index fb5bddc..fc17e19 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -3024,6 +3024,89 @@ Sysreg PMIAR_EL1 3 0 9 14 7 Field 63:0 ADDRESS EndSysreg =20 +SysregFields ICC_PPI_PRIORITYRx_EL1 +Res0 63:61 +Field 60:56 Priority7 +Res0 55:53 +Field 52:48 Priority6 +Res0 47:45 +Field 44:40 Priority5 +Res0 39:37 +Field 36:32 Priority4 +Res0 31:29 +Field 28:24 Priority3 +Res0 23:21 +Field 20:16 Priority2 +Res0 15:13 +Field 12:8 Priority1 +Res0 7:5 +Field 4:0 Priority0 +EndSysregFields + +Sysreg ICC_PPI_PRIORITYR0_EL1 3 0 12 14 0 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR1_EL1 3 0 12 14 1 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR2_EL1 3 0 12 14 2 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR3_EL1 3 0 12 14 3 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR4_EL1 3 0 12 14 4 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR5_EL1 3 0 12 14 5 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR6_EL1 3 0 12 14 6 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR7_EL1 3 0 12 14 7 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR8_EL1 3 0 12 15 0 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR9_EL1 3 0 12 15 1 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR10_EL1 3 0 12 15 2 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR11_EL1 3 0 12 15 3 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR12_EL1 3 0 12 15 4 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR13_EL1 3 0 12 15 5 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR14_EL1 3 0 12 15 6 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + +Sysreg ICC_PPI_PRIORITYR15_EL1 3 0 12 15 7 +Fields ICC_PPI_PRIORITYRx_EL1 +EndSysreg + Sysreg PMSELR_EL0 3 3 9 12 5 Res0 63:5 Field 4:0 SEL