From nobody Tue Oct 7 16:00:34 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C2082EA161 for ; Tue, 8 Jul 2025 18:20:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751998844; cv=none; b=u+rtJUhr2oPAbnRjjm0wunHOBV7QqWRPsAZxQhOJMpA9r2MoEFnu7SDILttP8GqF+3oi7rUzThfvPHZcsWPjewogvhEMJ9xXB8hOWX0FoVlPgmoFSltcDFNs7bnH70Mklsf4cNvP5FARF3/Q/cO7qfRg6X16s/nx357yCDplkYo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751998844; c=relaxed/simple; bh=gAfj/2nu4ZyFBs1JHgxh8n3AosgVKUdgON4oXVrdJlo=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=mondwRr8g5Q8FNQT3X1egQLii1yFA9bSDGhOXKcW2rmHagkGDjzU0dJeI0lXuQAoW/UIZw9JbFEE+fIrSXdhsp2zI6XfKoY4hElibENC7F7W9F6/p18PzU/xQ+Sy2IF5e547VxeUwOPZclnPAmrVjx+K1a7Kmcpfutj9BZuKBvA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=lE2UNkhC; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Y5neUGTC; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="lE2UNkhC"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Y5neUGTC" Date: Tue, 08 Jul 2025 18:20:40 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1751998841; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5vg+7S67ZqQgBCfhXKIT8u2xLS9oYHQdtQkkKyfLph0=; b=lE2UNkhCJeuO4I7YE7FYXOc2qWZhwM6PPQra8LS4QkIRpSrG2OL9QZOIM/hppEveXsRdla 6ItrW6f9x+mSOK2W9OB8wb7Het76Y6xbxMdek2Si078yc1wTlKSe9MICTt3JyH2H83bFHH T1dPyq7RunM/L/WSMveKH/Iw3bYYuzVWYN+CHHikC9mEfO74IIOP81Fdw0TqrmEH8tEQ9G jKXvJzmuU+h8/M77olKvgplVmO33xBfKNxL03/l4RDUX0WHkfWMhnrEd1wHE9JCJPjlh+i 2/FDHHDqVlsI2lO/LlfXKd3IHsGSwuWPgLX+eS0/T+IxoYNWhsb7jn5VIAtOpg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1751998841; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5vg+7S67ZqQgBCfhXKIT8u2xLS9oYHQdtQkkKyfLph0=; b=Y5neUGTC+avCcN3HwgpxnFibEibfKGmfSNEr2AKLrAFh0CzsbeU/3//msRkdFjd1ODTHR/ TLnoN45LF6hVRCDg== From: "irqchip-bot for Lorenzo Pieralisi" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER_EL1 Cc: Lorenzo Pieralisi , Jonathan Cameron , Marc Zyngier , Will Deacon , Catalin Marinas , tglx@linutronix.de In-Reply-To: <20250703-gicv5-host-v7-7-12e71f1b3528@kernel.org> References: <20250703-gicv5-host-v7-7-12e71f1b3528@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <175199884000.406.678301760064655895.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/irqchip-next branch of ir= qchip: Commit-ID: d4e375d8fee50ec50b63e47fc6efd1e1e75adb8e Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-plat= forms/d4e375d8fee50ec50b63e47fc6efd1e1e75adb8e Author: Lorenzo Pieralisi AuthorDate: Thu, 03 Jul 2025 12:24:57 +02:00 Committer: Marc Zyngier CommitterDate: Tue, 08 Jul 2025 18:35:50 +01:00 arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER_EL1 Add ICC_PPI_{C/S}ACTIVER_EL1 registers description. Signed-off-by: Lorenzo Pieralisi Reviewed-by: Jonathan Cameron Reviewed-by: Marc Zyngier Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier Acked-by: Catalin Marinas Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-7-12e71f1b3528@kerne= l.org Signed-off-by: Marc Zyngier --- arch/arm64/tools/sysreg | 83 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 728223d..f165003 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -3188,6 +3188,89 @@ Sysreg ICC_PPI_ENABLER1_EL1 3 0 12 10 7 Fields ICC_PPI_ENABLERx_EL1 EndSysreg =20 +SysregFields ICC_PPI_ACTIVERx_EL1 +Field 63 Active63 +Field 62 Active62 +Field 61 Active61 +Field 60 Active60 +Field 59 Active59 +Field 58 Active58 +Field 57 Active57 +Field 56 Active56 +Field 55 Active55 +Field 54 Active54 +Field 53 Active53 +Field 52 Active52 +Field 51 Active51 +Field 50 Active50 +Field 49 Active49 +Field 48 Active48 +Field 47 Active47 +Field 46 Active46 +Field 45 Active45 +Field 44 Active44 +Field 43 Active43 +Field 42 Active42 +Field 41 Active41 +Field 40 Active40 +Field 39 Active39 +Field 38 Active38 +Field 37 Active37 +Field 36 Active36 +Field 35 Active35 +Field 34 Active34 +Field 33 Active33 +Field 32 Active32 +Field 31 Active31 +Field 30 Active30 +Field 29 Active29 +Field 28 Active28 +Field 27 Active27 +Field 26 Active26 +Field 25 Active25 +Field 24 Active24 +Field 23 Active23 +Field 22 Active22 +Field 21 Active21 +Field 20 Active20 +Field 19 Active19 +Field 18 Active18 +Field 17 Active17 +Field 16 Active16 +Field 15 Active15 +Field 14 Active14 +Field 13 Active13 +Field 12 Active12 +Field 11 Active11 +Field 10 Active10 +Field 9 Active9 +Field 8 Active8 +Field 7 Active7 +Field 6 Active6 +Field 5 Active5 +Field 4 Active4 +Field 3 Active3 +Field 2 Active2 +Field 1 Active1 +Field 0 Active0 +EndSysregFields + +Sysreg ICC_PPI_CACTIVER0_EL1 3 0 12 13 0 +Fields ICC_PPI_ACTIVERx_EL1 +EndSysreg + +Sysreg ICC_PPI_CACTIVER1_EL1 3 0 12 13 1 +Fields ICC_PPI_ACTIVERx_EL1 +EndSysreg + +Sysreg ICC_PPI_SACTIVER0_EL1 3 0 12 13 2 +Fields ICC_PPI_ACTIVERx_EL1 +EndSysreg + +Sysreg ICC_PPI_SACTIVER1_EL1 3 0 12 13 3 +Fields ICC_PPI_ACTIVERx_EL1 +EndSysreg + SysregFields ICC_PPI_PRIORITYRx_EL1 Res0 63:61 Field 60:56 Priority7