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Sun, 11 May 2025 12:39:23 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , , , , Moshe Shemesh , Mark Bloch , Vlad Dogaru , Yevgeny Kliteynik , Gal Pressman Subject: [PATCH net-next 06/10] net/mlx5: HWS, force rehash when rule insertion failed Date: Sun, 11 May 2025 22:38:06 +0300 Message-ID: <1746992290-568936-7-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1746992290-568936-1-git-send-email-tariqt@nvidia.com> References: <1746992290-568936-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E66:EE_|DM4PR12MB5915:EE_ X-MS-Office365-Filtering-Correlation-Id: 779f00d3-5f2f-49e0-1005-08dd90c38d05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|30052699003|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?cvAVHfzGlDRzE/7X8VWKU5rVMY1fFmIPiIrEnPwNCXmUXI/NF7YVrXm64/UC?= =?us-ascii?Q?mbopo+curAMsKs8rpFpVYPGUCiziteq7BW9nFjBuaxHNiHvZO9pjuIxuh2eP?= =?us-ascii?Q?g6zSXq3GIwrpEPLE/emng9wgoIW3rgGHNUUOKlMnhiah1mZ4cvG2lie0/J9+?= =?us-ascii?Q?rWiS9VUG6ECC/FiQs63AXvxYA81S4FWFLxizjgEsHe4ZQoC9yMhrRy+G3un+?= =?us-ascii?Q?iDdRtOkDfvx5ciF6HmoPr51evQtUUvvMIUdY7T80kir+qyWrKZ3lWVrSYSjc?= =?us-ascii?Q?ZIs6j2ul+6QsqOr5OoT2HNMyM41lj7tE0at2xLmjoblJbINsw4i/VMc9QG/E?= =?us-ascii?Q?XIB1Kz4OBKadL55oAbL/2zjIyBww8LhoTA8UDhb3yMWVN5i2UoCj0txSuJ6I?= =?us-ascii?Q?Z1A6FAbMRN+fZNNbcmyZvDw15szLN9PEGNCmwLXA0N85WaUd0H7IQOJlOuQM?= =?us-ascii?Q?erLFuZG0G/JzznjkO/59fEHHE+nnJ/N0a24hdxmlTDAztDuh1zYSgAkJ+gGk?= =?us-ascii?Q?OdMxsswlM9ClLI6YYQhaI8kLqWELXrk7CHUseKysuy0JrXPEppICPizxSGUG?= =?us-ascii?Q?+zRLalcDL+yR/kCefH7tHYDMIod8gamlxPl0tgoyKKjuNGpC3ucNKKY8NRs9?= =?us-ascii?Q?b5OTNAsLDJtXM7+wz0JSK6jRsf8CsaOzdhByVlMPP/unH9q3A7gK86Hsjma6?= =?us-ascii?Q?vqbW1c5W0fS5LL9GJzxDjr4AnrPDjZhPvG/y4AcvvKHugUAUQTfMuWxdMMgb?= =?us-ascii?Q?eeJ9ebbqpTkPaeAGO2PjydNKUHcd4TGfFR3B4T0fRJv0s5IU3UbGTjk8syZL?= =?us-ascii?Q?LxTSVpOL2vvHhsNkarZm72NiNLA94KU5x36HVxRDuizN4jhGpN1P5QoUqfnJ?= =?us-ascii?Q?2Z/wq2gLzr6LqtslYeCxZWZIGxaJJi97w+IBfjg2uGXuIgzrdALnUI4JW8XR?= =?us-ascii?Q?DbynEBAI8KXnxUr6MtqmVuxCNknXG8IS+vnhB8YtzQ/YvTq4aZfTcnLbIwe3?= =?us-ascii?Q?XiSTwDd50E6MfL3UIIl1/KTi3eCQyLtspgSU279H9bKMgzgigdJgYXmkfVmA?= =?us-ascii?Q?AOKERpSx3Aj2XN24oA/B4a64iWWH1iGRUiPn45CFHkSWhnJ7cY0+1vBA2Mfa?= =?us-ascii?Q?ieNr2wUHSRvAinS6HwFLeJmE4I6iNJLYR1Hm2u0mk3VOnTDUJ0sFnIR7xGWu?= =?us-ascii?Q?cT6PlrFEnskS63t2MPf6Rj/LBOJfP9irwKSowdg+RQxvRHdDy/+xITU0jhoc?= =?us-ascii?Q?Mnfhh+cOYDxyI3z483eq2pY9pzkWQQbrHgsJ7V2lfwrQbj3fSPyfVHswYcIw?= =?us-ascii?Q?Hl3fVDjRU2tAc1dP7VynLWGlEmIb4hrzPc7K04YInEw8mtkuQQRpl+KZpuhw?= =?us-ascii?Q?IhgGEgl5Esu18ljXfXZgf5YsNEQ/ZWteRfQJzv9qn3lfi4Y3vubQRNGr9MlF?= =?us-ascii?Q?spvqUsIxKt2o0frZKtVq0X9HJPr3PSiEnawBj8G26SjOnrj0oCEyP/+CLO2I?= =?us-ascii?Q?t78dOVXoxvfohtkewziTAGiloyjZ7utu3yvE?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(30052699003)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2025 19:39:31.3602 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 779f00d3-5f2f-49e0-1005-08dd90c38d05 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E66.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5915 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yevgeny Kliteynik Rules are inserted into hash table in accordance with their hash index. When a certain number of rules is reached, the table is rehashed: a bigger new table is allocated and all the rules are moved there. But sometimes a new rule can't be inserted into the hash table because its index is full, even though the number of rules in the table is well below the threshold. The hash function is not perfect, so such cases are not rare. When that happens, we want to do the same rehash, in order to increase the table size and lower the probability for such cases. This patch fixes the usecase where rule insertion was failing, but rehash couldn't be initiated due to low number of rules: it adds flag that denotes that rehash is required, even if the number of rules in the table is below the rehash threshold. Signed-off-by: Yevgeny Kliteynik Reviewed-by: Vlad Dogaru Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c | 8 ++++++-- .../net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c b/d= rivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c index d70db6948dbb..dce2605fc99b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c @@ -169,6 +169,7 @@ mlx5hws_bwc_matcher_create(struct mlx5hws_table *table, return NULL; =20 atomic_set(&bwc_matcher->num_of_rules, 0); + atomic_set(&bwc_matcher->rehash_required, false); =20 /* Check if the required match params can be all matched * in single STE, otherwise complex matcher is needed. @@ -769,9 +770,9 @@ hws_bwc_matcher_rehash_size(struct mlx5hws_bwc_matcher = *bwc_matcher) =20 /* It is possible that other rule has already performed rehash. * Need to check again if we really need rehash. - * If the reason for rehash was size, but not any more - skip rehash. */ - if (!hws_bwc_matcher_rehash_size_needed(bwc_matcher, + if (!atomic_read(&bwc_matcher->rehash_required) && + !hws_bwc_matcher_rehash_size_needed(bwc_matcher, atomic_read(&bwc_matcher->num_of_rules))) return 0; =20 @@ -782,6 +783,8 @@ hws_bwc_matcher_rehash_size(struct mlx5hws_bwc_matcher = *bwc_matcher) * - destroy the old matcher */ =20 + atomic_set(&bwc_matcher->rehash_required, false); + ret =3D hws_bwc_matcher_extend_size(bwc_matcher); if (ret) return ret; @@ -875,6 +878,7 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_r= ule *bwc_rule, * Try rehash by size and insert rule again - last chance. */ =20 + atomic_set(&bwc_matcher->rehash_required, true); mutex_unlock(queue_lock); =20 hws_bwc_lock_all_queues(ctx); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h b/d= rivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h index cf2b65146317..d21fc247a510 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h @@ -30,6 +30,7 @@ struct mlx5hws_bwc_matcher { u8 size_log; u32 priority; atomic_t num_of_rules; + atomic_t rehash_required; struct list_head *rules; }; =20 --=20 2.31.1