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bh=wvdjdutKbIZItgd7xV8+18F8sRzhoQdyBXPiWKeJphE=; b=RgIKYUYuonWdNkJ+BO1QaGXQ5vJmMN7NWe9uLQTlSrA6Md8k4xyBRjou5jq8qyBDCAAB8W oykqz2DpgibuP7y2+/Ox92T83eqCmEuOACAcrKyKu9qMXIEju3cN3plA8jR+Dys8a4Y50C vSl2nG9oO14hp9irvy+GTLliMcZX0E/9KB3bJO0YBb1cyx/MVEPhz166zK5+gukzn3Cpvn k0NPXHcgEwQ4ZZwstULlC4iZUiJ4HdiVeiPe602wQ6kcolpnj01FLjKvdZMojooNDXaHIv GqmNR/cjl2gi2GNIG0GXSgV5MG5bHmf/dY1f5M0Jk0MFjDXMMWnFCPErgRptqw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1746643246; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wvdjdutKbIZItgd7xV8+18F8sRzhoQdyBXPiWKeJphE=; b=rTqUZ3AMsLWFpjb6XTL9PFjvqXSYrBQFZlPQ58GlRaox2vuGSXGjpt+Bhe0VBZ4sSPkGoK IZ3G56rW7pNK80AA== From: "tip-bot2 for Ingo Molnar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/msr] um: Add UML version of to define rdtsc() Cc: kernel test robot , Ingo Molnar , Johannes Berg , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <202505080003.0t7ewxGp-lkp@intel.com> References: <202505080003.0t7ewxGp-lkp@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174664324585.406.10812098910624084030.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/msr branch of tip: Commit-ID: 24b58adaa7508d9d2cdb6bca44803954baf24459 Gitweb: https://git.kernel.org/tip/24b58adaa7508d9d2cdb6bca44803954b= af24459 Author: Ingo Molnar AuthorDate: Wed, 07 May 2025 20:18:22 +02:00 Committer: Ingo Molnar CommitterDate: Wed, 07 May 2025 20:30:39 +02:00 um: Add UML version of to define rdtsc() In the x86 tree rdtsc() methods got moved out of , but this broke UML, as the x86 version of cannot be used by UML as-is: CC [M] drivers/accel/habanalabs/common/habanalabs_ioctl.o In file included from drivers/accel/habanalabs/common/habanalabs_ioctl.c:2= 0: ./arch/x86/include/asm/tsc.h:70:28: error: conflicting types for =E2=80=98= cycles_t=E2=80=99; have =E2=80=98long long unsigned int=E2=80=99 70 | typedef unsigned long long cycles_t; | ^~~~~~~~ In file included from ./arch/um/include/asm/timex.h:7, from ./include/linux/timex.h:67, from ./include/linux/time32.h:13, from ./include/linux/time.h:60, from ./include/linux/skbuff.h:15, from ./include/linux/if_ether.h:19, from ./include/linux/habanalabs/cpucp_if.h:12, from drivers/accel/habanalabs/common/habanalabs.h:11, from drivers/accel/habanalabs/common/habanalabs_ioctl.c:1= 1: ./include/asm-generic/timex.h:8:23: note: previous declaration of =E2=80= =98cycles_t=E2=80=99 with type =E2=80=98cycles_t=E2=80=99 {aka =E2=80=98lon= g unsigned int=E2=80=99} 8 | typedef unsigned long cycles_t; | ^~~~~~~~ To resolve these kinds of problems and to allow to be included = on UML, add a simplified version of , which only adds the rdtsc() defini= tion. Reported-by: kernel test robot Signed-off-by: Ingo Molnar Cc: Johannes Berg Link: https://lore.kernel.org/r/202505080003.0t7ewxGp-lkp@intel.com Reviewed-by if it's fine to you, or will change the patch if it's not. --- arch/um/include/asm/tsc.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 arch/um/include/asm/tsc.h diff --git a/arch/um/include/asm/tsc.h b/arch/um/include/asm/tsc.h new file mode 100644 index 0000000..a52b0e4 --- /dev/null +++ b/arch/um/include/asm/tsc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_UM_TSC_H +#define _ASM_UM_TSC_H + +#include + +/** + * rdtsc() - returns the current TSC without ordering constraints + * + * rdtsc() returns the result of RDTSC as a 64-bit integer. The + * only ordering constraint it supplies is the ordering implied by + * "asm volatile": it will put the RDTSC in the place you expect. The + * CPU can and will speculatively execute that RDTSC, though, so the + * results can be non-monotonic if compared on different CPUs. + */ +static __always_inline u64 rdtsc(void) +{ + EAX_EDX_DECLARE_ARGS(val, low, high); + + asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); + + return EAX_EDX_VAL(val, low, high); +} + +#endif /* _ASM_UM_TSC_H */