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Bae" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/fpu] x86/fpu: Refactor xfeature bitmask update code for sigframe XSAVE Cc: "Chang S. Bae" , Ingo Molnar , Andy Lutomirski , "H. Peter Anvin" , Linus Torvalds , Oleg Nesterov , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250416021720.12305-8-chang.seok.bae@intel.com> References: <20250416021720.12305-8-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174479143782.31282.8590053248637936011.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/fpu branch of tip: Commit-ID: 64e54461ab6e8524a8de4e63b7d1a3e4481b5cf3 Gitweb: https://git.kernel.org/tip/64e54461ab6e8524a8de4e63b7d1a3e44= 81b5cf3 Author: Chang S. Bae AuthorDate: Tue, 15 Apr 2025 19:16:57 -07:00 Committer: Ingo Molnar CommitterDate: Wed, 16 Apr 2025 10:01:00 +02:00 x86/fpu: Refactor xfeature bitmask update code for sigframe XSAVE Currently, saving register states in the signal frame, the legacy feature bits are always set in xregs_state->header->xfeatures. This code sequence can be generalized for reuse in similar cases. Refactor the logic to ensure a consistent approach across similar usages. Signed-off-by: Chang S. Bae Signed-off-by: Ingo Molnar Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Oleg Nesterov Link: https://lore.kernel.org/r/20250416021720.12305-8-chang.seok.bae@intel= .com --- arch/x86/kernel/fpu/signal.c | 11 +---------- arch/x86/kernel/fpu/xstate.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index b8b4fa9..c3ec251 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -114,7 +114,6 @@ static inline bool save_xstate_epilog(void __user *buf,= int ia32_frame, { struct xregs_state __user *x =3D buf; struct _fpx_sw_bytes sw_bytes =3D {}; - u32 xfeatures; int err; =20 /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ @@ -128,12 +127,6 @@ static inline bool save_xstate_epilog(void __user *buf= , int ia32_frame, (__u32 __user *)(buf + fpstate->user_size)); =20 /* - * Read the xfeatures which we copied (directly from the cpu or - * from the state in task struct) to the user buffers. - */ - err |=3D __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures); - - /* * For legacy compatible, we always set FP/SSE bits in the bit * vector while saving the state to the user context. This will * enable us capturing any changes(during sigreturn) to @@ -144,9 +137,7 @@ static inline bool save_xstate_epilog(void __user *buf,= int ia32_frame, * header as well as change any contents in the memory layout. * xrestore as part of sigreturn will capture all the changes. */ - xfeatures |=3D XFEATURE_MASK_FPSSE; - - err |=3D __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures); + err |=3D set_xfeature_in_sigframe(x, XFEATURE_MASK_FPSSE); =20 return !err; } diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h index 9a3a8cc..4231e44 100644 --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -69,6 +69,19 @@ static inline u64 xfeatures_mask_independent(void) return fpu_kernel_cfg.independent_features; } =20 +static inline int set_xfeature_in_sigframe(struct xregs_state __user *xbuf= , u64 mask) +{ + u64 xfeatures; + int err; + + /* Read the xfeatures value already saved in the user buffer */ + err =3D __get_user(xfeatures, &xbuf->header.xfeatures); + xfeatures |=3D mask; + err |=3D __put_user(xfeatures, &xbuf->header.xfeatures); + + return err; +} + /* * Update the value of PKRU register that was already pushed onto the sign= al frame. */