From nobody Fri Dec 19 00:20:08 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5571257AE7; Tue, 25 Mar 2025 09:36:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742895396; cv=none; b=Y/Tc4Nn3MGxNZ6tiadVFPsxPkC4bDVgp8dxDx8O0P3fq24hFbNpW0euQgHn34oD0yX+3W99nOpOwxAwfyMJkqr6cRAhW1x4DoGcME3ce5WMa1cKpw+TNPmIWVqU69iZN7pKQCDJ0t2s7uIakKqYLDUTp5wObpkLNNcHsZBpArAg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742895396; c=relaxed/simple; bh=XKwdGc1utKZGzKqsbULWCdffD5CDiGRLcnsG45wAr9I=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=cB/LrGJEz1IXh+rJVJH13gQC9vuABxmSgKOvyKFD6lQFNFSN0ZTePYB1amzVhRcfTfJ/YpF0PZ1iYOyQhF5VrX7PMDAx7Sh/DgSw7BuetcPMBMMhnCRf1v5UkyjHc9G99tWJiP4bTN+SMXTgFWctAvLUmFMK3fxHTBDHw196tO8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=A1sEh2cB; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=IsZeyFJJ; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="A1sEh2cB"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="IsZeyFJJ" Date: Tue, 25 Mar 2025 09:36:32 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1742895393; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EShZ/gTjFpS8Q+aVdpwDVa6I0ZQ5UJIoWH8WEFDW9m0=; b=A1sEh2cBcMdNCpLdrFZhIdToNeS3FXDIzRVG4OWjZnHJdOZzLXsFPGlFMNZjduDQ7uSnjb d7um16H0HTJDc0fnrniP8giYxGPx3PHsGZaTcySLAAwyJnPrSXQ1BP9ckqd4I7wy40iBdz YF4ydpY57ExxoMgUVxxZox9PAyLpF8GvaYum3hY1jlI3hy7Tlpths6+akUO02Swvfy/hN5 TwK/ZtfDrgpWjcy3y7bBN5cajsiPuTszt1c45gmiWG59scrfKu0GNctBpY8l7kIsp1alh+ 23VqPrgiPQhwyictb3ck2Sp7xJsReaY8BVedXcaGU+cilqcnJrLiu/iCJTk+6Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1742895393; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EShZ/gTjFpS8Q+aVdpwDVa6I0ZQ5UJIoWH8WEFDW9m0=; b=IsZeyFJJzd/t6C+mQoLA8ZrFnSXMQPO0LZCHQ6krkS+q1wctQ2cH6fvYa0pYS70Ejk189H rNiMs+bsOsAma5Dw== From: "tip-bot2 for Ahmed S. Darwish" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/cacheinfo: Align ci_info_init() assignment expressions Cc: "Ahmed S. Darwish" , Ingo Molnar , "H. Peter Anvin" , Linus Torvalds , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250324133324.23458-10-darwi@linutronix.de> References: <20250324133324.23458-10-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174289539246.14745.2388513944980339068.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 036a73b5174477b72d881b4c75740d3dbfd7ec49 Gitweb: https://git.kernel.org/tip/036a73b5174477b72d881b4c75740d3db= fd7ec49 Author: Ahmed S. Darwish AuthorDate: Mon, 24 Mar 2025 14:33:04 +01:00 Committer: Ingo Molnar CommitterDate: Tue, 25 Mar 2025 10:22:26 +01:00 x86/cacheinfo: Align ci_info_init() assignment expressions The ci_info_init() function initializes 10 members of a 'struct cacheinfo' instance using passed data from CPUID leaf 0x4. Such assignment expressions are difficult to read in their current form. Align them for clarity. Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250324133324.23458-10-darwi@linutronix.de --- arch/x86/kernel/cpu/cacheinfo.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinf= o.c index fc4b49e..b273ecf 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -936,19 +936,16 @@ static void __cache_cpumap_setup(unsigned int cpu, in= t index, static void ci_info_init(struct cacheinfo *ci, const struct _cpuid4_info_regs *base) { - ci->id =3D base->id; - ci->attributes =3D CACHE_ID; - ci->level =3D base->eax.split.level; - ci->type =3D cache_type_map[base->eax.split.type]; - ci->coherency_line_size =3D - base->ebx.split.coherency_line_size + 1; - ci->ways_of_associativity =3D - base->ebx.split.ways_of_associativity + 1; - ci->size =3D base->size; - ci->number_of_sets =3D base->ecx.split.number_of_sets + 1; - ci->physical_line_partition =3D - base->ebx.split.physical_line_partition + 1; - ci->priv =3D base->nb; + ci->id =3D base->id; + ci->attributes =3D CACHE_ID; + ci->level =3D base->eax.split.level; + ci->type =3D cache_type_map[base->eax.split.type]; + ci->coherency_line_size =3D base->ebx.split.coherency_line_size + 1; + ci->ways_of_associativity =3D base->ebx.split.ways_of_associativity + 1; + ci->size =3D base->size; + ci->number_of_sets =3D base->ecx.split.number_of_sets + 1; + ci->physical_line_partition =3D base->ebx.split.physical_line_partition += 1; + ci->priv =3D base->nb; } =20 int init_cache_level(unsigned int cpu)