From nobody Wed Dec 17 03:03:47 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAB162561D1; Wed, 19 Mar 2025 11:03:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742382223; cv=none; b=Klc05pro9mdt++NeRJo8SkVtliOBvYiCGiCvvt2GSqBTf4YUgiFQeCRe4y49NYusdjaCT8K6H9rdz9dwxMigUpuwjX9j0fvXCyzib71cS1u+VHY9Q1KXyr4VL2R7/z5WVvw3ODQH1jsZo+NOMxQngfVronHs2EJKTkXmqm8vtW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742382223; c=relaxed/simple; bh=tZ6OeAiXOLDhTWbMFgdhj9yOjN9IrbdWrUAzZe/EvEM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=JMljlUPPz+OqdaflfCpAOvjmhAcVZfat0EGswfg6Iw1XXNgxosBoYpoMP6vZa+m9tCL2M3XtAp9loIfC8gmjXMNoNKSTeu6E4yTX+WEvlrvVWtPESOWHj0WEUk1WuhNm62kNP36m8J1oe/tykgKUs4dMrLyMeS4L5XI0iqac4pI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=XCrZC5K5; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Q1EqlF06; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="XCrZC5K5"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Q1EqlF06" Date: Wed, 19 Mar 2025 11:03:37 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1742382218; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BJafSyDzxv5mKvL5sU6LXtdpMsGN6JKbSsbPyNtYhYk=; b=XCrZC5K5c0EAaMtr3h762x6a0E63RHAJFi0Ht0iFCVWLci3NCosc8t1BNJ7s3Jx9xrR90Y RJ2MtbOUd8TM4C34kohcioai1vrbauUVATvnXTr1oAtN6GLDi2bugL41jQtPIOKYDayTWP rceA6hPwQCJJI39btlYnLs4w3EfJ08z4aC1XVzxVNw3ZkRfcoj2a1yXxPCA+OXsGzkBdcW rzO/S6JRPSkt259GPsgvZSmWsBpkKC3ICuyoMvxLbcP3h4bDnXV7c73r6FL+wLjYGF1qiq cFrvV0YCuX4hjqKEE+wzqcODNwjcWHJ9VpHjOmCBWBVbo/6Fxa08hz92j6bBOg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1742382218; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BJafSyDzxv5mKvL5sU6LXtdpMsGN6JKbSsbPyNtYhYk=; b=Q1EqlF06nTnNuib2qv6ajeWdwR1buxW7yzgIv9DhEP2hZzLVcfnks+I1Df8PRnzhQh0UXq izziJpUgRwWthTCg== From: "tip-bot2 for Sohil Mehta" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/core] x86/mm/pat: Replace Intel x86_model checks with VFM ones Cc: Sohil Mehta , Ingo Molnar , Andy Lutomirski , Peter Zijlstra , Rik van Riel , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250219184133.816753-13-sohil.mehta@intel.com> References: <20250219184133.816753-13-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174238221777.14745.12144164016776827924.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/core branch of tip: Commit-ID: 05d234d3c79e16ee5329dbbc611d1dde6c8c5ab3 Gitweb: https://git.kernel.org/tip/05d234d3c79e16ee5329dbbc611d1dde6= c8c5ab3 Author: Sohil Mehta AuthorDate: Wed, 19 Feb 2025 18:41:30=20 Committer: Ingo Molnar CommitterDate: Wed, 19 Mar 2025 11:19:53 +01:00 x86/mm/pat: Replace Intel x86_model checks with VFM ones Introduce markers and names for some Family 6 and Family 15 models and replace x86_model checks with VFM ones. Since the VFM checks are closed ended and only applicable to Intel, get rid of the explicit Intel vendor check as well. Signed-off-by: Sohil Mehta Signed-off-by: Ingo Molnar Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Rik van Riel Cc: Borislav Petkov Cc: "H. Peter Anvin" Link: https://lore.kernel.org/r/20250219184133.816753-13-sohil.mehta@intel.= com --- arch/x86/include/asm/intel-family.h | 1 + arch/x86/mm/pat/memtype.c | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/int= el-family.h index 51ea366..6cd08da 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -193,6 +193,7 @@ /* Family 15 - NetBurst */ #define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ #define INTEL_P4_PRESCOTT IFM(15, 0x03) +#define INTEL_P4_CEDARMILL IFM(15, 0x06) /* Also Xeon Dempsey */ =20 /* Family 19 */ #define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond Rapids */ diff --git a/arch/x86/mm/pat/memtype.c b/arch/x86/mm/pat/memtype.c index feb8cc6..e40861c 100644 --- a/arch/x86/mm/pat/memtype.c +++ b/arch/x86/mm/pat/memtype.c @@ -43,6 +43,7 @@ #include #include =20 +#include #include #include #include @@ -290,9 +291,8 @@ void __init pat_bp_init(void) return; } =20 - if ((c->x86_vendor =3D=3D X86_VENDOR_INTEL) && - (((c->x86 =3D=3D 0x6) && (c->x86_model <=3D 0xd)) || - ((c->x86 =3D=3D 0xf) && (c->x86_model <=3D 0x6)))) { + if ((c->x86_vfm >=3D INTEL_PENTIUM_PRO && c->x86_vfm <=3D INTEL_PENTIUM= _M_DOTHAN) || + (c->x86_vfm >=3D INTEL_P4_WILLAMETTE && c->x86_vfm <=3D INTEL_P4_CEDA= RMILL)) { /* * PAT support with the lower four entries. Intel Pentium 2, * 3, M, and 4 are affected by PAT errata, which makes the