From nobody Wed Dec 17 08:57:08 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 788DE1898FB; Tue, 18 Mar 2025 19:02:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742324537; cv=none; b=T7eEd2PNvbeegYgOxTyugsxuHUsFINmNTHfX6Cu/qbwKcaiqRptPEGsvzz6iu3r1rUcRT3iUwpB4z6qZmhaehyRQpLDEm8MTHndNIhtyUzlU+6q05gXa/BI+FDBfVXmywE+W61iLFkzeicML4FBvx4q60kWrINCC6IlFfrXh9Cc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742324537; c=relaxed/simple; bh=T175AQCXpVLRWh0pnxrkYNlK5LXTZtj+QBFR1YkSnlk=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=LsorH0xC5+gR+7fWhf8CFaJ6hZpUjpdx6LQvrsBjbJ/aROUg5PrN41vj5gxh98oCM5eD/DIK/8TlMO1B/nwEvsckYuI+R/V6bkRlx0URYzzcvyzLNiNrPm41tGPQhnS/Pp5AJpiNQ7BnzhBrUUOBhTNNbLxBYkfY5gvmqjypn6U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=jRuG9FSE; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=6P6YR+3I; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="jRuG9FSE"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="6P6YR+3I" Date: Tue, 18 Mar 2025 18:54:26 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1742324067; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1QisBsWn0f7Jz8sIf8HYMqaE1Xiro/I8V9ghKdXk5dE=; b=jRuG9FSENlx4HMObVaXO7b6SwFr1QLRf6xKh4mKG470KE2tdsGGb5JHrWX5eV9JbGXx2Gc n5iwM3bLNSpsnukOnuTGYmYhYeodxW2C48AHmGsYXNedQSl8W5aiONiB3SNwch4tOJRbpw RtNE974G5miKkkK4cJ5MjqC9Ps6JIFbhW9FwJzDzoUzCNi7z1h5zlK4iIhmUNJTvC7IfFQ recXOc5zC1U3uvdaYKjQyPSx0TJfGmjvp2iD37R6II/ARLoy3c6jMEnDNlvu+yKbGhnYY7 0/cFHv8FzRzqbYNBmjAgplwkM6LB4wJ6CbfKRYOUGd5OF9+bvyNpN0B/0MBYcA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1742324067; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1QisBsWn0f7Jz8sIf8HYMqaE1Xiro/I8V9ghKdXk5dE=; b=6P6YR+3Iu5dAu5gYZXzA5gaDA93ttujcBiGRzjAyv8Os8j6Di+v5xmED4gzhT0h+plIz4L qAzan6k4kqmFkgAg== From: "tip-bot2 for Sohil Mehta" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/mm/pat: Replace Intel x86_model checks with VFM ones Cc: Sohil Mehta , Ingo Molnar , Andy Lutomirski , Peter Zijlstra , Rik van Riel , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250219184133.816753-13-sohil.mehta@intel.com> References: <20250219184133.816753-13-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174232406675.14745.16839508278274331287.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: aa3e8239d8a2aa4dce2750968964afb5cdd424f8 Gitweb: https://git.kernel.org/tip/aa3e8239d8a2aa4dce2750968964afb5c= dd424f8 Author: Sohil Mehta AuthorDate: Wed, 19 Feb 2025 18:41:30=20 Committer: Ingo Molnar CommitterDate: Tue, 18 Mar 2025 19:33:47 +01:00 x86/mm/pat: Replace Intel x86_model checks with VFM ones Introduce markers and names for some Family 6 and Family 15 models and replace x86_model checks with VFM ones. Since the VFM checks are closed ended and only applicable to Intel, get rid of the explicit Intel vendor check as well. Signed-off-by: Sohil Mehta Signed-off-by: Ingo Molnar Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Rik van Riel Cc: Borislav Petkov Cc: "H. Peter Anvin" Link: https://lore.kernel.org/r/20250219184133.816753-13-sohil.mehta@intel.= com --- arch/x86/include/asm/intel-family.h | 1 + arch/x86/mm/pat/memtype.c | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/int= el-family.h index 51ea366..6cd08da 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -193,6 +193,7 @@ /* Family 15 - NetBurst */ #define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ #define INTEL_P4_PRESCOTT IFM(15, 0x03) +#define INTEL_P4_CEDARMILL IFM(15, 0x06) /* Also Xeon Dempsey */ =20 /* Family 19 */ #define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond Rapids */ diff --git a/arch/x86/mm/pat/memtype.c b/arch/x86/mm/pat/memtype.c index 3a9e6dd..fff9617 100644 --- a/arch/x86/mm/pat/memtype.c +++ b/arch/x86/mm/pat/memtype.c @@ -43,6 +43,7 @@ #include #include =20 +#include #include #include #include @@ -290,9 +291,8 @@ void __init pat_bp_init(void) return; } =20 - if ((c->x86_vendor =3D=3D X86_VENDOR_INTEL) && - (((c->x86 =3D=3D 0x6) && (c->x86_model <=3D 0xd)) || - ((c->x86 =3D=3D 0xf) && (c->x86_model <=3D 0x6)))) { + if ((c->x86_vfm >=3D INTEL_PENTIUM_PRO && c->x86_vfm <=3D INTEL_PENTIUM= _M_DOTHAN) || + (c->x86_vfm >=3D INTEL_P4_WILLAMETTE && c->x86_vfm <=3D INTEL_P4_CEDA= RMILL)) { /* * PAT support with the lower four entries. Intel Pentium 2, * 3, M, and 4 are affected by PAT errata, which makes the