From nobody Wed Dec 17 10:47:52 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD78420C478; Tue, 18 Mar 2025 12:00:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742299212; cv=none; b=AcSoVncnCHKTRbZGBUnXgjBo3SD8mbOmf5q+05Zwz5bxyWg6ioRFU7fHSlIlFJyiu7sqSZxtTes+fRAx5fFTKi4lnNnhbpNyDAPqQ0m82PPUHeNXaPRqyxvTe5jrTamnCl5BrZqkf8LJQakhKtsX1fWvargTZEuTP8gyk1P7VIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742299212; c=relaxed/simple; bh=PJcEYcg+/fI7SDW/ALy1xeOcVfC0mb8T8XPc5iCSgmM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=dteVQ+wffJ0FbbAzsL0c6T7m7xpquIGAuo0drxuZD6Upo4wZQbtnX2OkB1mhhKFmkYpiXQ0dp3VQ+qVlUZ6X+ZzUiHxKIhjVrWCN73ECjBBox4blzYE3ti3PkcDWxFxgw4NMypD/GPbHorDxCyDgJV4Yoyrw4S3rlpffTHgMTnQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CPi7iiPR; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=zy+UYUZl; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CPi7iiPR"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="zy+UYUZl" Date: Tue, 18 Mar 2025 12:00:07 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1742299209; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7R5n9S1D8x2ERjs1LUaKnpq50ZX+Yq7TxI5HtMMP1cc=; b=CPi7iiPRqjwP7R8kVsiX9+KMbY2aYKupxgcU7yK+fTAutJGff0RW1N9JcRwgI+00QDFF98 oHyGySxMzM7t5G7bRhnp2lI+tMC1Yzcd0/P0vUfXCyWQdD+QtYXeI1AuUp6jkg6ynY7TZ+ L2/iuKh1HRMRsGM6mD3++UUnEnXct3GgsaOlXDQ8xtMtqTWgs8fJpbbVxios3CML0o3ADr kQN8tgI9X2DPLnfy/Yqi2xstns8REn+MLzxpGfqMMBBAq7CU+a1hhgFYwHYXPhhKmKBci2 ZvJSi3pj6lVlpIou2paKJCRH0X0mJvPTdOCbZ5f/riBNeyGzN+8ktRbgbqQpRA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1742299209; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7R5n9S1D8x2ERjs1LUaKnpq50ZX+Yq7TxI5HtMMP1cc=; b=zy+UYUZlLEWNctwbzcmfK6VkCx8acYWDhKAetSek6/A583lBEfqXG4v5GdqVqapenhcdEg UqIkA1VUYnvqIMBQ== From: "tip-bot2 for Ingo Molnar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/cpuid: Clean up Cc: Ingo Molnar , Andrew Cooper , "H. Peter Anvin" , John Ogness , "Ahmed S. Darwish" , x86-cpuid@lists.linux.dev, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250317221824.3738853-4-mingo@kernel.org> References: <20250317221824.3738853-4-mingo@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174229920796.14745.2870340797932662284.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: f2f828b547abb37fe60bc3419414c50327b7acff Gitweb: https://git.kernel.org/tip/f2f828b547abb37fe60bc3419414c5032= 7b7acff Author: Ingo Molnar AuthorDate: Mon, 17 Mar 2025 23:18:22 +01:00 Committer: Ingo Molnar CommitterDate: Tue, 18 Mar 2025 09:35:58 +01:00 x86/cpuid: Clean up - Include first, as is customary. This also has the side effect of build-testing the header dependency assumptions in the types header. - No newline necessary after the SPDX line - Newline necessary after inline function definitions - Rename native_cpuid_reg() to NATIVE_CPUID_REG(): it's a CPP macro, whose name we capitalize in such cases. - Prettify the CONFIG_PARAVIRT_XXL inclusion block a bit - Standardize register references in comments to EAX/EBX/ECX/etc., from the hodgepodge of references. - s/cpus/CPUs because why add noise to common acronyms? Signed-off-by: Ingo Molnar Cc: Andrew Cooper Cc: "H. Peter Anvin" Cc: John Ogness Cc: "Ahmed S. Darwish" Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250317221824.3738853-4-mingo@kernel.org --- arch/x86/include/asm/cpuid/api.h | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/= api.h index 4d1da9c..f26926b 100644 --- a/arch/x86/include/asm/cpuid/api.h +++ b/arch/x86/include/asm/cpuid/api.h @@ -1,16 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0 */ - #ifndef _ASM_X86_CPUID_API_H #define _ASM_X86_CPUID_API_H =20 +#include + #include #include =20 -#include #include =20 /* - * Raw CPUID accessors + * Raw CPUID accessors: */ =20 #ifdef CONFIG_X86_32 @@ -21,6 +21,7 @@ static inline bool have_cpuid_p(void) return true; } #endif + static inline void native_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) { @@ -34,7 +35,7 @@ static inline void native_cpuid(unsigned int *eax, unsign= ed int *ebx, : "memory"); } =20 -#define native_cpuid_reg(reg) \ +#define NATIVE_CPUID_REG(reg) \ static inline unsigned int native_cpuid_##reg(unsigned int op) \ { \ unsigned int eax =3D op, ebx, ecx =3D 0, edx; \ @@ -45,22 +46,23 @@ static inline unsigned int native_cpuid_##reg(unsigned = int op) \ } =20 /* - * Native CPUID functions returning a single datum. + * Native CPUID functions returning a single datum: */ -native_cpuid_reg(eax) -native_cpuid_reg(ebx) -native_cpuid_reg(ecx) -native_cpuid_reg(edx) +NATIVE_CPUID_REG(eax) +NATIVE_CPUID_REG(ebx) +NATIVE_CPUID_REG(ecx) +NATIVE_CPUID_REG(edx) =20 #ifdef CONFIG_PARAVIRT_XXL -#include +# include #else -#define __cpuid native_cpuid +# define __cpuid native_cpuid #endif =20 /* * Generic CPUID function - * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx + * + * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX * resulting in stale register contents being returned. */ static inline void cpuid(unsigned int op, @@ -72,7 +74,7 @@ static inline void cpuid(unsigned int op, __cpuid(eax, ebx, ecx, edx); } =20 -/* Some CPUID calls want 'count' to be placed in ecx */ +/* Some CPUID calls want 'count' to be placed in ECX */ static inline void cpuid_count(unsigned int op, int count, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) @@ -83,7 +85,7 @@ static inline void cpuid_count(unsigned int op, int count, } =20 /* - * CPUID functions returning a single datum + * CPUID functions returning a single datum: */ =20 static inline unsigned int cpuid_eax(unsigned int op)