From nobody Tue Dec 16 11:06:56 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71F141FBC85; Thu, 20 Feb 2025 14:26:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740061602; cv=none; b=GPrdi/5kdmAT6cvbFz61+bPplhrSDt3ofkTbIoijQMJUSsfcdFAcLzkdcCJLwoW6GTmruI/PalfBZ8i/tMwVBbivqDYJEojJcF/to+XpJabsrTMsQ61oXudMgHi+TCMrg0Nv46Cs/QOCkpblMaD7roOhoUSXokOaOTLXzy7DZF0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740061602; c=relaxed/simple; bh=D76i4UeZXGETQLM6dzb7LYLmlkd56yoV/Tci2qe8ENw=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=f2352S2SVU6T/k8UuqJEdilyDmLvz94WMjgHvzgmlQsSu6SHd24IcCLhOM/MeXuiLyRE9BaY5N0YcsDAn40OpDSTKcxPA+7LBjpEXQtq6PrPG7GYN4dyWJ0nglU5Vsy1lGuMS42suzD8nmmK/hIPL2TgCpPVkmrFtRzRmXhmptQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=zxmWvtj4; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=cxDFh8Dk; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="zxmWvtj4"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="cxDFh8Dk" Date: Thu, 20 Feb 2025 14:26:37 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1740061598; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VgM/SUqI/8kiH1fiMXDWVmwIXdu9XL6yBQimB9lWaqs=; b=zxmWvtj4ERuvcxL4dnjIh8SR6N8XIBm2cbQibotS9JYPE704nWOND+u+SPNiSioJ6Z/p8G G4YX3oFevdfwLacVPMPslhQa+dFfWuTGcgSOkcMEFy2uWBpaEB3fiw7WWihvP2V1Kbi3L8 vPPzs0V2Z60yuKgnTnElSOt5iVA0gpNCKHQuVHxqWpc7ifPwfypiPVP5q4CUqGmmax2HG7 x/d+KBIeci3TQzlOvcm0FYE/d23pMh9uO9gNmQZbLExvJdMJoXc4D34Kxpx0vg1JTjhKFU VpVctwf2qOQzjZkxUbSg7d1W9e4qLsoVtr35ESU/Ym5JsET2dLDUWlfSXo2zXA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1740061598; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VgM/SUqI/8kiH1fiMXDWVmwIXdu9XL6yBQimB9lWaqs=; b=cxDFh8Dk2c4Jp4EJWJKCgllXGqu6E7H7/qcpr5WpSHJ6Q3U1INXSfgbxT4yhCZH4NR3GW3 N7Bf8vN1wmZJBSAA== From: "tip-bot2 for Anup Patel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/riscv-imsic: Implement irq_force_complete_move() for IMSIC Cc: Anup Patel , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250217085657.789309-9-apatel@ventanamicro.com> References: <20250217085657.789309-9-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174006159771.10177.9977379903349807136.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 51611130d57d2061729010bd0575701aa4b7ff74 Gitweb: https://git.kernel.org/tip/51611130d57d2061729010bd0575701aa= 4b7ff74 Author: Anup Patel AuthorDate: Mon, 17 Feb 2025 14:26:54 +05:30 Committer: Thomas Gleixner CommitterDate: Thu, 20 Feb 2025 15:19:27 +01:00 irqchip/riscv-imsic: Implement irq_force_complete_move() for IMSIC Implement irq_force_complete_move() for IMSIC driver so that in-flight vector movements on a CPU can be cleaned-up when the CPU goes down. Signed-off-by: Anup Patel Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20250217085657.789309-9-apatel@ventanamic= ro.com --- drivers/irqchip/irq-riscv-imsic-platform.c | 32 +++++++++++++++++++++- drivers/irqchip/irq-riscv-imsic-state.c | 17 +++++++++++- drivers/irqchip/irq-riscv-imsic-state.h | 1 +- 3 files changed, 50 insertions(+) diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/i= rq-riscv-imsic-platform.c index 9a5e7b4..b9e3f90 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -129,6 +129,37 @@ static int imsic_irq_set_affinity(struct irq_data *d, = const struct cpumask *mask =20 return IRQ_SET_MASK_OK_DONE; } + +static void imsic_irq_force_complete_move(struct irq_data *d) +{ + struct imsic_vector *mvec, *vec =3D irq_data_get_irq_chip_data(d); + unsigned int cpu =3D smp_processor_id(); + + if (WARN_ON(!vec)) + return; + + /* Do nothing if there is no in-flight move */ + mvec =3D imsic_vector_get_move(vec); + if (!mvec) + return; + + /* Do nothing if the old IMSIC vector does not belong to current CPU */ + if (mvec->cpu !=3D cpu) + return; + + /* + * The best we can do is force cleanup the old IMSIC vector. + * + * The challenges over here are same as x86 vector domain so + * refer to the comments in irq_force_complete_move() function + * implemented at arch/x86/kernel/apic/vector.c. + */ + + /* Force cleanup in-flight move */ + pr_info("IRQ fixup: irq %d move in progress, old vector cpu %d local_id %= d\n", + d->irq, mvec->cpu, mvec->local_id); + imsic_vector_force_move_cleanup(vec); +} #endif =20 static struct irq_chip imsic_irq_base_chip =3D { @@ -137,6 +168,7 @@ static struct irq_chip imsic_irq_base_chip =3D { .irq_unmask =3D imsic_irq_unmask, #ifdef CONFIG_SMP .irq_set_affinity =3D imsic_irq_set_affinity, + .irq_force_complete_move =3D imsic_irq_force_complete_move, #endif .irq_retrigger =3D imsic_irq_retrigger, .irq_compose_msi_msg =3D imsic_irq_compose_msg, diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-= riscv-imsic-state.c index 1aeba76..eb0a9b6 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -311,6 +311,23 @@ void imsic_vector_unmask(struct imsic_vector *vec) raw_spin_unlock(&lpriv->lock); } =20 +void imsic_vector_force_move_cleanup(struct imsic_vector *vec) +{ + struct imsic_local_priv *lpriv; + struct imsic_vector *mvec; + unsigned long flags; + + lpriv =3D per_cpu_ptr(imsic->lpriv, vec->cpu); + raw_spin_lock_irqsave(&lpriv->lock, flags); + + mvec =3D READ_ONCE(vec->move_prev); + WRITE_ONCE(vec->move_prev, NULL); + if (mvec) + imsic_vector_free(mvec); + + raw_spin_unlock_irqrestore(&lpriv->lock, flags); +} + static bool imsic_vector_move_update(struct imsic_local_priv *lpriv, struct imsic_vector *vec, bool is_old_vec, bool new_enable, struct imsic_vector *move_vec) diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-= riscv-imsic-state.h index f02842b..19dea0c 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.h +++ b/drivers/irqchip/irq-riscv-imsic-state.h @@ -91,6 +91,7 @@ static inline struct imsic_vector *imsic_vector_get_move(= struct imsic_vector *ve return READ_ONCE(vec->move_prev); } =20 +void imsic_vector_force_move_cleanup(struct imsic_vector *vec); void imsic_vector_move(struct imsic_vector *old_vec, struct imsic_vector *= new_vec); =20 struct imsic_vector *imsic_vector_from_local_id(unsigned int cpu, unsigned= int local_id);