From nobody Tue Dec 16 11:08:26 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A7EB1FAC5E; Thu, 20 Feb 2025 14:26:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740061601; cv=none; b=kgTxHLpTyQztQlxzWtRsS0Vtn+kOtCA0xloA2idYddVotfTIPDDQ13togM+Ws1rRAj8HrRzbJ4MsOtOUFLxiY7rYlY7vZkmfgzsDOG0JyM0KmyLnVLp5cuLr9ZeySSvttzPOeC7yUzkyWtUnXlASOhrfJZCu6snMsUvbOivp8hM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740061601; c=relaxed/simple; bh=8gB4CclerRTqSjPNM2WK50bvixIdyR2ExfUQCVGu3bc=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=pSZYGSL5F9Rggv9AGQI+t7DxESovlu+Y4+ASw1KpkPMe0//AE0VA7uwSfnE0eCpYcSGR/A80080I5l7E/sO4iPrprk6mwG0xR7r2bunGiIYEeCYt9C0OaKAVxqUTKUKLY7KhZKCy6MhhVaA2mvctB8zTb81DR8t6gCaNnrzyvhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=N8/Xyl9k; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=tpPgfmpU; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="N8/Xyl9k"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="tpPgfmpU" Date: Thu, 20 Feb 2025 14:26:37 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1740061597; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GsKLgYYlkQjGjtV5SbB7fNdf8ojwIZwif91xyIgWQfw=; b=N8/Xyl9kSu45ZGYpIsbcXFAvY0M4HOqiTdh17hVcgV+PXhRQG0kQZKmx+uGpr+ycpxFO8l +ZBZtsS/XXXjCaRybLSkFqLm0IKrJkc2DGMNxmGCpe8T6h6G9qT5eXgO2dd+0wt579fC7F 3XcQp7TpgFPVZ0Fck6DxJyv9tWeCpg6fKh34m/aN0TENSboTfzTvHYjRv/5G6NkMiSfp+D 2sK++lJ6Mjwu/yMOLjeDD5u/YNkc+BeIl7wPHGkpPzPTv1OrYsFdBjOidd9KSa9PGhzz47 G6ZQqluK5Q4RXtq/SKqg2H/hjrUiSdq0u56BZ+AX8+Jt9Xwka07UcS4twsThxA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1740061597; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GsKLgYYlkQjGjtV5SbB7fNdf8ojwIZwif91xyIgWQfw=; b=tpPgfmpUAsZ2lXIYgY4cHMlD3QKy5NwlUWH+ZpBAOrhSvlaTIgwFLXLSd68QfM6+4lhw4p 3kczS5awS4HV6VAA== From: "tip-bot2 for Anup Patel" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/riscv-imsic: Avoid interrupt translation in interrupt handler Cc: Anup Patel , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250217085657.789309-10-apatel@ventanamicro.com> References: <20250217085657.789309-10-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <174006159714.10177.3287098668958747550.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 0bd55080ba9e3c16719f75006fd85b932c85f2f4 Gitweb: https://git.kernel.org/tip/0bd55080ba9e3c16719f75006fd85b932= c85f2f4 Author: Anup Patel AuthorDate: Mon, 17 Feb 2025 14:26:55 +05:30 Committer: Thomas Gleixner CommitterDate: Thu, 20 Feb 2025 15:19:27 +01:00 irqchip/riscv-imsic: Avoid interrupt translation in interrupt handler Currently, imsic_handle_irq() uses generic_handle_domain_irq() to handle the interrupt, which internally has an extra step of resolving hwirq using domain. Avoid the translation step by replacing the hardware interrupt number with the Linux interrupt number in the IMSIC vector data and directly call generic_handle_irq(). Signed-off-by: Anup Patel Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20250217085657.789309-10-apatel@ventanami= cro.com --- drivers/irqchip/irq-riscv-imsic-early.c | 6 ++---- drivers/irqchip/irq-riscv-imsic-platform.c | 2 +- drivers/irqchip/irq-riscv-imsic-state.c | 8 ++++---- drivers/irqchip/irq-riscv-imsic-state.h | 4 ++-- 4 files changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-early.c b/drivers/irqchip/irq-= riscv-imsic-early.c index b5def62..d2e8ed7 100644 --- a/drivers/irqchip/irq-riscv-imsic-early.c +++ b/drivers/irqchip/irq-riscv-imsic-early.c @@ -73,7 +73,7 @@ static int __init imsic_ipi_domain_init(void) { return 0;= } static void imsic_handle_irq(struct irq_desc *desc) { struct irq_chip *chip =3D irq_desc_get_chip(desc); - int err, cpu =3D smp_processor_id(); + int cpu =3D smp_processor_id(); struct imsic_vector *vec; unsigned long local_id; =20 @@ -103,9 +103,7 @@ static void imsic_handle_irq(struct irq_desc *desc) continue; } =20 - err =3D generic_handle_domain_irq(imsic->base_domain, vec->hwirq); - if (unlikely(err)) - pr_warn_ratelimited("hwirq 0x%x mapping not found\n", vec->hwirq); + generic_handle_irq(vec->irq); } =20 chained_irq_exit(chip, desc); diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/i= rq-riscv-imsic-platform.c index b9e3f90..6bf5d63 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -111,7 +111,7 @@ static int imsic_irq_set_affinity(struct irq_data *d, c= onst struct cpumask *mask return -EBUSY; =20 /* Get a new vector on the desired set of CPUs */ - new_vec =3D imsic_vector_alloc(old_vec->hwirq, mask_val); + new_vec =3D imsic_vector_alloc(old_vec->irq, mask_val); if (!new_vec) return -ENOSPC; =20 diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-= riscv-imsic-state.c index eb0a9b6..b0849af 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -422,7 +422,7 @@ struct imsic_vector *imsic_vector_from_local_id(unsigne= d int cpu, unsigned int l return &lpriv->vectors[local_id]; } =20 -struct imsic_vector *imsic_vector_alloc(unsigned int hwirq, const struct c= pumask *mask) +struct imsic_vector *imsic_vector_alloc(unsigned int irq, const struct cpu= mask *mask) { struct imsic_vector *vec =3D NULL; struct imsic_local_priv *lpriv; @@ -438,7 +438,7 @@ struct imsic_vector *imsic_vector_alloc(unsigned int hw= irq, const struct cpumask =20 lpriv =3D per_cpu_ptr(imsic->lpriv, cpu); vec =3D &lpriv->vectors[local_id]; - vec->hwirq =3D hwirq; + vec->irq =3D irq; vec->enable =3D false; vec->move_next =3D NULL; vec->move_prev =3D NULL; @@ -451,7 +451,7 @@ void imsic_vector_free(struct imsic_vector *vec) unsigned long flags; =20 raw_spin_lock_irqsave(&imsic->matrix_lock, flags); - vec->hwirq =3D UINT_MAX; + vec->irq =3D 0; irq_matrix_free(imsic->matrix, vec->cpu, vec->local_id, false); raw_spin_unlock_irqrestore(&imsic->matrix_lock, flags); } @@ -510,7 +510,7 @@ static int __init imsic_local_init(void) vec =3D &lpriv->vectors[i]; vec->cpu =3D cpu; vec->local_id =3D i; - vec->hwirq =3D UINT_MAX; + vec->irq =3D 0; } } =20 diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-= riscv-imsic-state.h index 19dea0c..3202ffa 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.h +++ b/drivers/irqchip/irq-riscv-imsic-state.h @@ -20,7 +20,7 @@ struct imsic_vector { unsigned int cpu; unsigned int local_id; /* Details saved by driver in the vector */ - unsigned int hwirq; + unsigned int irq; /* Details accessed using local lock held */ bool enable; struct imsic_vector *move_next; @@ -96,7 +96,7 @@ void imsic_vector_move(struct imsic_vector *old_vec, stru= ct imsic_vector *new_ve =20 struct imsic_vector *imsic_vector_from_local_id(unsigned int cpu, unsigned= int local_id); =20 -struct imsic_vector *imsic_vector_alloc(unsigned int hwirq, const struct c= pumask *mask); +struct imsic_vector *imsic_vector_alloc(unsigned int irq, const struct cpu= mask *mask); void imsic_vector_free(struct imsic_vector *vector); =20 void imsic_vector_debug_show(struct seq_file *m, struct imsic_vector *vec,= int ind);