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bh=UZyvLTjKoVdG+MXmJXxqDrvBXC3SChHTB02YpcJow14=; b=SZjF2gevtBr8g0XITEyNzWrJSb1f5OHbItr6k2by3lQZLET2lxpAkFAHQ3R4Fd7T2YHDEF RxRl2rrYCj7tmdCl3rTNT/e7DZhY9zDNqCEqOFmrfa/ZABqTUqOb9M18AEyu03uay67S05 skfEz9O7FZvf56oVmTNrYtIVV45wCCN7yDulzPnkcsi3AjoJ9zpFV9SFZ/gbZM0w7AJm2v ZMB2ZUjiqLheYZBP7k2IyH78bLCM7nImsemtAOU0+3sRB2uHRIKN7Bawi3A5Yk27qDFmW9 hAKWzATeyqptzA6jhXKXK/23+SZGuz/zz781cEa+FcNfw0VojXAySrZqh60dMQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1739962917; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UZyvLTjKoVdG+MXmJXxqDrvBXC3SChHTB02YpcJow14=; b=rvVsCTRBaUmhP229O1g4tCOyoXffGNb7+Re4lT9yPgNUdeTUMijAzu3DlmolF7a4jD5hOo e1zw8QstUCQL2lCw== From: "tip-bot2 for Ravi Bangoria" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the kernel Cc: Ravi Bangoria , "Peter Zijlstra (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20250205060547.1337-4-ravi.bangoria@amd.com> References: <20250205060547.1337-4-ravi.bangoria@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <173996290231.10177.11960731856088166114.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the perf/core branch of tip: Commit-ID: 3201bfa368fee5e70927e45222ff0b235352c01c Gitweb: https://git.kernel.org/tip/3201bfa368fee5e70927e45222ff0b235= 352c01c Author: Ravi Bangoria AuthorDate: Wed, 05 Feb 2025 06:05:43=20 Committer: Peter Zijlstra CommitterDate: Mon, 17 Feb 2025 15:20:05 +01:00 perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the kernel Sync load latency related bit fields into the tool's header copy Signed-off-by: Ravi Bangoria Signed-off-by: Peter Zijlstra (Intel) Link: https://lkml.kernel.org/r/20250205060547.1337-4-ravi.bangoria@amd.com --- tools/arch/x86/include/asm/amd-ibs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/arch/x86/include/asm/amd-ibs.h b/tools/arch/x86/include/= asm/amd-ibs.h index 93807b4..cb1740b 100644 --- a/tools/arch/x86/include/asm/amd-ibs.h +++ b/tools/arch/x86/include/asm/amd-ibs.h @@ -64,7 +64,8 @@ union ibs_op_ctl { opmaxcnt_ext:7, /* 20-26: upper 7 bits of periodic op maximum count */ reserved0:5, /* 27-31: reserved */ opcurcnt:27, /* 32-58: periodic op counter current count */ - reserved1:5; /* 59-63: reserved */ + ldlat_thrsh:4, /* 59-62: Load Latency threshold */ + ldlat_en:1; /* 63: Load Latency enabled */ }; };