From nobody Wed Dec 17 04:18:09 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E338B202C30; Fri, 6 Dec 2024 10:16:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733480220; cv=none; b=lr3UMP85lTx5AY/0k8KwoZzdTIr6j8WcOQX4Me/JHE311/UbWOTNbsr83thx+IGUJ4Yz5tJtmLFTuHevDpQKjdOM7kzDClvqwV8iIQhs4oVXqOCccVHccWg4I4ziiNvjRPSG2JDPaTv5iJRBRvzy8DtFUfz17TOCrckiU4oMv3c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733480220; c=relaxed/simple; bh=iWiSHoNLaq/SDNDeTdJC672hXxTN4CmbTwp/zeU0JSI=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=bIwg/ZSHX898aZcKd6OJo18ofXL0+E4NEsomXjaDQVptEcg+cIlPtgLy2A+61BWl9V8Sufw/4tlU4J+5sWK12+rYLi2vaN/qroxH3IjthMk9vvCcVVhFlZwOF4K2W9GP9J7bc3XkQZbhK7gU5orNCtsTdRO3TdpZbOVD9tz8HTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=oz4l/PLT; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=NUWNfOD0; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="oz4l/PLT"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="NUWNfOD0" Date: Fri, 06 Dec 2024 10:16:54 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1733480215; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r8tAJFRrpYxeW7nKhc1TQcqdug4vI72WIluKt88nAm0=; b=oz4l/PLTO5X3JyrVyP+RfRbzo4yV3mq9oKta024uqgW6D62ty3KrjVSTdBWx0Ng4njHREO cahMXKU3dITY7PSm+CTKnsynqcwXSvPAc1M08JoMC64PwjMGOqQV3WbPs/8TfZrl5pT6h0 x1R83Co+ZKvCfbai80zIlojRfkjwb7Jkoiv5/6jbymfI7/KK1LtzwnVP1QQ+RkTAPTIlHS ROqx3hkNrmn5Q/lPhcyhUab0QbO2rBUF4BbLv1NQis78o2FlKfrZzUV/8uzmh/dEWaUezS vTIhBGtTSy3yOuQMXZFwqCmuRmmFBlzL5/ZbMnP8fisoghuzXelTaR9KTFljMw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1733480215; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r8tAJFRrpYxeW7nKhc1TQcqdug4vI72WIluKt88nAm0=; b=NUWNfOD0rXBGVRa9M9ebW+m8bAl3L4109hW7//zdZIZLrSnkj7/rXGrufbMkKp4lrzSdEJ HGTG7fR+utbXPLDQ== From: "tip-bot2 for Juergen Gross" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/paravirt: Remove the WBINVD callback Cc: Juergen Gross , Ingo Molnar , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20241203071550.26487-1-jgross@suse.com> References: <20241203071550.26487-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <173348021446.412.8378612838011605003.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 29188c16006176caee6cb6729103be51a29c1a93 Gitweb: https://git.kernel.org/tip/29188c16006176caee6cb6729103be51a= 29c1a93 Author: Juergen Gross AuthorDate: Tue, 03 Dec 2024 08:15:50 +01:00 Committer: Ingo Molnar CommitterDate: Fri, 06 Dec 2024 11:01:36 +01:00 x86/paravirt: Remove the WBINVD callback The pv_ops::cpu.wbinvd paravirt callback is a leftover of lguest times. Today it is no longer needed, as all users use the native WBINVD implementation. Remove the callback and rename native_wbinvd() to wbinvd(). Signed-off-by: Juergen Gross Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/r/20241203071550.26487-1-jgross@suse.com --- arch/x86/include/asm/paravirt.h | 7 ------- arch/x86/include/asm/paravirt_types.h | 2 -- arch/x86/include/asm/special_insns.h | 8 +------- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +- arch/x86/kernel/paravirt.c | 6 ------ arch/x86/kernel/process.c | 4 ++-- arch/x86/xen/enlighten_pv.c | 2 -- 7 files changed, 4 insertions(+), 27 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index d4eb9e1..041aff5 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -180,13 +180,6 @@ static inline void halt(void) PVOP_VCALL0(irq.halt); } =20 -extern noinstr void pv_native_wbinvd(void); - -static __always_inline void wbinvd(void) -{ - PVOP_ALT_VCALL0(cpu.wbinvd, "wbinvd", ALT_NOT_XEN); -} - static inline u64 paravirt_read_msr(unsigned msr) { return PVOP_CALL1(u64, cpu.read_msr, msr); diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 8d4fbe1..fea56b0 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -86,8 +86,6 @@ struct pv_cpu_ops { void (*update_io_bitmap)(void); #endif =20 - void (*wbinvd)(void); - /* cpuid emulation, mostly so that caps bits can be disabled */ void (*cpuid)(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx); diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/sp= ecial_insns.h index aec6e2d..fab7c8a 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -115,7 +115,7 @@ static inline void wrpkru(u32 pkru) } #endif =20 -static __always_inline void native_wbinvd(void) +static __always_inline void wbinvd(void) { asm volatile("wbinvd": : :"memory"); } @@ -167,12 +167,6 @@ static inline void __write_cr4(unsigned long x) { native_write_cr4(x); } - -static __always_inline void wbinvd(void) -{ - native_wbinvd(); -} - #endif /* CONFIG_PARAVIRT_XXL */ =20 static __always_inline void clflush(volatile void *__p) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cp= u/resctrl/pseudo_lock.c index 972e6b6..b72f7e9 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -459,7 +459,7 @@ static int pseudo_lock_fn(void *_rdtgrp) * increase likelihood that allocated cache portion will be filled * with associated memory. */ - native_wbinvd(); + wbinvd(); =20 /* * Always called with interrupts enabled. By disabling interrupts diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index fec3815..927e33e 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -116,11 +116,6 @@ static noinstr void pv_native_set_debugreg(int regno, = unsigned long val) native_set_debugreg(regno, val); } =20 -noinstr void pv_native_wbinvd(void) -{ - native_wbinvd(); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); @@ -148,7 +143,6 @@ struct paravirt_patch_template pv_ops =3D { .cpu.read_cr0 =3D native_read_cr0, .cpu.write_cr0 =3D native_write_cr0, .cpu.write_cr4 =3D native_write_cr4, - .cpu.wbinvd =3D pv_native_wbinvd, .cpu.read_msr =3D native_read_msr, .cpu.write_msr =3D native_write_msr, .cpu.read_msr_safe =3D native_read_msr_safe, diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index f63f8fd..58ead05 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -825,7 +825,7 @@ void __noreturn stop_this_cpu(void *dummy) * X86_FEATURE_SME due to cmdline options. */ if (c->extended_cpuid_level >=3D 0x8000001f && (cpuid_eax(0x8000001f) & B= IT(0))) - native_wbinvd(); + wbinvd(); =20 /* * This brings a cache line back and dirties it, but @@ -846,7 +846,7 @@ void __noreturn stop_this_cpu(void *dummy) /* * Use native_halt() so that memory contents don't change * (stack usage and variables) after possibly issuing the - * native_wbinvd() above. + * wbinvd() above. */ native_halt(); } diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index d6818c6..fd21690 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1161,8 +1161,6 @@ static const typeof(pv_ops) xen_cpu_ops __initconst = =3D { =20 .write_cr4 =3D xen_write_cr4, =20 - .wbinvd =3D pv_native_wbinvd, - .read_msr =3D xen_read_msr, .write_msr =3D xen_write_msr,