From nobody Sun Feb 8 15:46:04 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76B491FECBD; Mon, 2 Dec 2024 11:14:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733138059; cv=none; b=CgHc0zo5+rVbYjLoZmPPjhwkclZWBW0UDcv6wTZMI2VpONCit0oM7J8Jd6dKmx/B3xLMM3p4iUc4RIum+o8hNwahlC8TVL6UpEpWorogdP9sHKKR+PShFBZZyQIbLyZ3sT7VpEpFJEz0uEuLe55OQHHk9ctDPk63QYoLsjuu/gk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733138059; c=relaxed/simple; bh=exlcBw6oxZKNNix3DoBFEhjc3V/hB4k0s3DMMF+7fu8=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=qfV405LhYPmiCviKzZj7s5+5+xYKnDa4PVg+8ByjI2HXh3WjP4TD+lqel2m2JYAsEXZhbffxvw23zHiYnt/CK2TGck27QPome5hFzxAdOjPoweMFuhnecxbAV1mbOek8PYfcUl86hEG7dzEKPGreBDkTGmoMLeyn2HLoKgfpvTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=sruJxDKO; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=3LGrRBJb; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="sruJxDKO"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="3LGrRBJb" Date: Mon, 02 Dec 2024 11:14:15 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1733138055; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+nZYOHJZabvn71VTzPfGCZqnEdrJDmrhdSY0HHjIuY8=; b=sruJxDKO1ozyKzANx5/FfVz7Zp7AuOZUKAJjCAgXaCRQx0ddZ5I+E9rjxTlYkdDT4eEChf 0PbU/Qk/u87kXwSJ/TweTx5kqwP4sojt70BGDIwXBfH+oVeFJKaSQl/eAuuvYohnv3Uz7j 9ilt2PHezz5woyqYpxd2FGqBGCQtZLPWPC5jkG+FEREGBLgGlJ0jZKCmf+T9n7IZmdNln1 N6abA36ZueNlh0X0QMnjudDPpy/6GkBlf+aMs5S+9LxNf/f6V0An9m5MeDbIr+wMIEfUOA mo9lnizFGGlBeS+9K+7dQgow34b4xhIbIABAJgCsX62lRO87GLcO8A50VeK0Zw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1733138055; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+nZYOHJZabvn71VTzPfGCZqnEdrJDmrhdSY0HHjIuY8=; b=3LGrRBJbpgBI7tLsS+k83rOtm66D/SLXVHsDEHk7vt8Lv5Jdx5PsnfpOvOePHp65cTUGoc IjR9KyzifR2XRuCw== From: "tip-bot2 for Dhananjay Ugwekar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86/rapl: Modify the generic variable names to *_pkg* Cc: Dhananjay Ugwekar , "Peter Zijlstra (Intel)" , "Gautham R. Shenoy" , Zhang Rui , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20241115060805.447565-8-Dhananjay.Ugwekar@amd.com> References: <20241115060805.447565-8-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <173313805519.412.6879155305550347090.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the perf/core branch of tip: Commit-ID: abf03d9bd20cf55ebdc4c7f0955d21759aeb0523 Gitweb: https://git.kernel.org/tip/abf03d9bd20cf55ebdc4c7f0955d21759= aeb0523 Author: Dhananjay Ugwekar AuthorDate: Fri, 15 Nov 2024 06:08:03=20 Committer: Peter Zijlstra CommitterDate: Mon, 02 Dec 2024 12:01:36 +01:00 perf/x86/rapl: Modify the generic variable names to *_pkg* Prepare for the addition of RAPL core energy counter support. Replace the generic names with *_pkg*, to later on differentiate between the scopes of the two different PMUs and their variables. No functional change. Signed-off-by: Dhananjay Ugwekar Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: "Gautham R. Shenoy" Reviewed-by: Zhang Rui Tested-by: Zhang Rui Link: https://lore.kernel.org/r/20241115060805.447565-8-Dhananjay.Ugwekar@a= md.com --- arch/x86/events/rapl.c | 120 ++++++++++++++++++++-------------------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 249bcd3..8cdc578 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -70,18 +70,18 @@ MODULE_LICENSE("GPL"); /* * RAPL energy status counters */ -enum perf_rapl_events { +enum perf_rapl_pkg_events { PERF_RAPL_PP0 =3D 0, /* all cores */ PERF_RAPL_PKG, /* entire package */ PERF_RAPL_RAM, /* DRAM */ PERF_RAPL_PP1, /* gpu */ PERF_RAPL_PSYS, /* psys */ =20 - PERF_RAPL_MAX, - NR_RAPL_DOMAINS =3D PERF_RAPL_MAX, + PERF_RAPL_PKG_EVENTS_MAX, + NR_RAPL_PKG_DOMAINS =3D PERF_RAPL_PKG_EVENTS_MAX, }; =20 -static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = =3D { +static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __init= const =3D { "pp0-core", "package", "dram", @@ -112,7 +112,7 @@ static struct perf_pmu_events_attr event_attr_##v =3D {= \ * considered as either pkg-scope or die-scope, and we are considering * them as die-scope. */ -#define rapl_pmu_is_pkg_scope() \ +#define rapl_pkg_pmu_is_pkg_scope() \ (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || \ boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) =20 @@ -139,16 +139,16 @@ enum rapl_unit_quirk { }; =20 struct rapl_model { - struct perf_msr *rapl_msrs; - unsigned long events; + struct perf_msr *rapl_pkg_msrs; + unsigned long pkg_events; unsigned int msr_power_unit; enum rapl_unit_quirk unit_quirk; }; =20 /* 1/2^hw_unit Joule */ -static int rapl_hw_unit[NR_RAPL_DOMAINS] __read_mostly; -static struct rapl_pmus *rapl_pmus; -static unsigned int rapl_cntr_mask; +static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly; +static struct rapl_pmus *rapl_pmus_pkg; +static unsigned int rapl_pkg_cntr_mask; static u64 rapl_timer_ms; static struct perf_msr *rapl_msrs; static struct rapl_model *rapl_model; @@ -164,8 +164,8 @@ static inline unsigned int get_rapl_pmu_idx(int cpu) * (for non-existent mappings in topology map) to UINT_MAX, so * the error check in the caller is simplified. */ - return rapl_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : - topology_logical_die_id(cpu); + return rapl_pkg_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : + topology_logical_die_id(cpu); } =20 static inline u64 rapl_read_counter(struct perf_event *event) @@ -177,7 +177,7 @@ static inline u64 rapl_read_counter(struct perf_event *= event) =20 static inline u64 rapl_scale(u64 v, int cfg) { - if (cfg > NR_RAPL_DOMAINS) { + if (cfg > NR_RAPL_PKG_DOMAINS) { pr_warn("Invalid domain %d, failed to scale data\n", cfg); return v; } @@ -187,7 +187,7 @@ static inline u64 rapl_scale(u64 v, int cfg) * or use ldexp(count, -32). * Watts =3D Joules/Time delta */ - return v << (32 - rapl_hw_unit[cfg - 1]); + return v << (32 - rapl_pkg_hw_unit[cfg - 1]); } =20 static u64 rapl_event_update(struct perf_event *event) @@ -348,7 +348,7 @@ static int rapl_pmu_event_init(struct perf_event *event) unsigned int rapl_pmu_idx; =20 /* only look at RAPL events */ - if (event->attr.type !=3D rapl_pmus->pmu.type) + if (event->attr.type !=3D rapl_pmus_pkg->pmu.type) return -ENOENT; =20 /* check only supported bits are set */ @@ -358,14 +358,14 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) if (event->cpu < 0) return -EINVAL; =20 - if (!cfg || cfg >=3D NR_RAPL_DOMAINS + 1) + if (!cfg || cfg >=3D NR_RAPL_PKG_DOMAINS + 1) return -EINVAL; =20 - cfg =3D array_index_nospec((long)cfg, NR_RAPL_DOMAINS + 1); + cfg =3D array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1); bit =3D cfg - 1; =20 /* check event supported */ - if (!(rapl_cntr_mask & (1 << bit))) + if (!(rapl_pkg_cntr_mask & (1 << bit))) return -EINVAL; =20 /* unsupported modes and filters */ @@ -373,11 +373,11 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) return -EINVAL; =20 rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu); - if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) + if (rapl_pmu_idx >=3D rapl_pmus_pkg->nr_rapl_pmu) return -EINVAL; =20 /* must be done before validate_group */ - rapl_pmu =3D rapl_pmus->rapl_pmu[rapl_pmu_idx]; + rapl_pmu =3D rapl_pmus_pkg->rapl_pmu[rapl_pmu_idx]; if (!rapl_pmu) return -EINVAL; =20 @@ -531,11 +531,11 @@ static struct perf_msr intel_rapl_spr_msrs[] =3D { }; =20 /* - * Force to PERF_RAPL_MAX size due to: - * - perf_msr_probe(PERF_RAPL_MAX) + * Force to PERF_RAPL_PKG_EVENTS_MAX size due to: + * - perf_msr_probe(PERF_RAPL_PKG_EVENTS_MAX) * - want to use same event codes across both architectures */ -static struct perf_msr amd_rapl_msrs[] =3D { +static struct perf_msr amd_rapl_pkg_msrs[] =3D { [PERF_RAPL_PP0] =3D { 0, &rapl_events_cores_group, NULL, false, 0 }, [PERF_RAPL_PKG] =3D { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group= , test_msr, false, RAPL_MSR_MASK }, [PERF_RAPL_RAM] =3D { 0, &rapl_events_ram_group, NULL, false, 0 }, @@ -551,8 +551,8 @@ static int rapl_check_hw_unit(void) /* protect rdmsrl() to handle virtualization */ if (rdmsrl_safe(rapl_model->msr_power_unit, &msr_rapl_power_unit_bits)) return -1; - for (i =3D 0; i < NR_RAPL_DOMAINS; i++) - rapl_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; + for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) + rapl_pkg_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; =20 switch (rapl_model->unit_quirk) { /* @@ -562,11 +562,11 @@ static int rapl_check_hw_unit(void) * of 2. Datasheet, September 2014, Reference Number: 330784-001 " */ case RAPL_UNIT_QUIRK_INTEL_HSW: - rapl_hw_unit[PERF_RAPL_RAM] =3D 16; + rapl_pkg_hw_unit[PERF_RAPL_RAM] =3D 16; break; /* SPR uses a fixed energy unit for Psys domain. */ case RAPL_UNIT_QUIRK_INTEL_SPR: - rapl_hw_unit[PERF_RAPL_PSYS] =3D 0; + rapl_pkg_hw_unit[PERF_RAPL_PSYS] =3D 0; break; default: break; @@ -581,9 +581,9 @@ static int rapl_check_hw_unit(void) * if hw unit is 32, then we use 2 ms 1/200/2 */ rapl_timer_ms =3D 2; - if (rapl_hw_unit[0] < 32) { + if (rapl_pkg_hw_unit[0] < 32) { rapl_timer_ms =3D (1000 / (2 * 100)); - rapl_timer_ms *=3D (1ULL << (32 - rapl_hw_unit[0] - 1)); + rapl_timer_ms *=3D (1ULL << (32 - rapl_pkg_hw_unit[0] - 1)); } return 0; } @@ -593,12 +593,12 @@ static void __init rapl_advertise(void) int i; =20 pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\= n", - hweight32(rapl_cntr_mask), rapl_timer_ms); + hweight32(rapl_pkg_cntr_mask), rapl_timer_ms); =20 - for (i =3D 0; i < NR_RAPL_DOMAINS; i++) { - if (rapl_cntr_mask & (1 << i)) { + for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) { + if (rapl_pkg_cntr_mask & (1 << i)) { pr_info("hw unit of domain %s 2^-%d Joules\n", - rapl_domain_names[i], rapl_hw_unit[i]); + rapl_pkg_domain_names[i], rapl_pkg_hw_unit[i]); } } } @@ -679,71 +679,71 @@ static int __init init_rapl_pmus(struct rapl_pmus **r= apl_pmus_ptr, int rapl_pmu_ } =20 static struct rapl_model model_snb =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_PP1), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_snbep =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_hsw =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PP1), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_hsx =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_HSW, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_knl =3D { - .events =3D BIT(PERF_RAPL_PKG) | + .pkg_events =3D BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_HSW, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_skl =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PP1) | BIT(PERF_RAPL_PSYS), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_spr =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PSYS), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_SPR, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_spr_msrs, + .rapl_pkg_msrs =3D intel_rapl_spr_msrs, }; =20 static struct rapl_model model_amd_hygon =3D { - .events =3D BIT(PERF_RAPL_PKG), + .pkg_events =3D BIT(PERF_RAPL_PKG), .msr_power_unit =3D MSR_AMD_RAPL_POWER_UNIT, - .rapl_msrs =3D amd_rapl_msrs, + .rapl_pkg_msrs =3D amd_rapl_pkg_msrs, }; =20 static const struct x86_cpu_id rapl_model_match[] __initconst =3D { @@ -799,11 +799,11 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); static int __init rapl_pmu_init(void) { const struct x86_cpu_id *id; - int rapl_pmu_scope =3D PERF_PMU_SCOPE_DIE; + int rapl_pkg_pmu_scope =3D PERF_PMU_SCOPE_DIE; int ret; =20 - if (rapl_pmu_is_pkg_scope()) - rapl_pmu_scope =3D PERF_PMU_SCOPE_PKG; + if (rapl_pkg_pmu_is_pkg_scope()) + rapl_pkg_pmu_scope =3D PERF_PMU_SCOPE_PKG; =20 id =3D x86_match_cpu(rapl_model_match); if (!id) @@ -811,20 +811,20 @@ static int __init rapl_pmu_init(void) =20 rapl_model =3D (struct rapl_model *) id->driver_data; =20 - rapl_msrs =3D rapl_model->rapl_msrs; + rapl_msrs =3D rapl_model->rapl_pkg_msrs; =20 - rapl_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, - false, (void *) &rapl_model->events); + rapl_pkg_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_PKG_EVENTS_MAX, + false, (void *) &rapl_model->pkg_events); =20 ret =3D rapl_check_hw_unit(); if (ret) return ret; =20 - ret =3D init_rapl_pmus(&rapl_pmus, rapl_pmu_scope); + ret =3D init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope); if (ret) return ret; =20 - ret =3D perf_pmu_register(&rapl_pmus->pmu, "power", -1); + ret =3D perf_pmu_register(&rapl_pmus_pkg->pmu, "power", -1); if (ret) goto out; =20 @@ -833,14 +833,14 @@ static int __init rapl_pmu_init(void) =20 out: pr_warn("Initialization failed (%d), disabled\n", ret); - cleanup_rapl_pmus(rapl_pmus); + cleanup_rapl_pmus(rapl_pmus_pkg); return ret; } module_init(rapl_pmu_init); =20 static void __exit intel_rapl_exit(void) { - perf_pmu_unregister(&rapl_pmus->pmu); - cleanup_rapl_pmus(rapl_pmus); + perf_pmu_unregister(&rapl_pmus_pkg->pmu); + cleanup_rapl_pmus(rapl_pmus_pkg); } module_exit(intel_rapl_exit);