From nobody Tue Nov 26 22:28:03 2024 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A4912036E3; Tue, 15 Oct 2024 18:40:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729017610; cv=none; b=Tq+Yh/GKCu/8UTZC6TkHl0MwjK1hdh923Xyf9WDlIXNX5kGA1HWd9wH9m4cNMvgCH74bmnTjcK+glcVXn8FZ5+FSrBFOS1RIsxgj8Le1WFUA3rGDWZ+KV1faRtRQgHu5BXWX/68GA80eSmssnefFxxZXUw9rkA4w+gKixL4geU0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729017610; c=relaxed/simple; bh=O32/x0jgoXEVBJisE5ZiTUlRDxKf44L9Q8icNmu+NYM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=AqF+X0Oy9yxf8DiwSVDqJE8DMZBZ6FmGx+ptP5fjnzbyMWIV64noatSXNi7aMPg3BQzlk4nSXwOWLi4W7iqFax3gwBTnwRb1bKcqRf+rr4iN78inUrUElGRA51iTrUusld4kS7rh+gY3oJUcQwnv/vgET9uSsEuKxfRT8dD6GMs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=a9+184Kr; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=BREkziV/; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="a9+184Kr"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="BREkziV/" Date: Tue, 15 Oct 2024 18:40:06 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1729017606; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=68a46Dz0xqZoTJ1bSg2oRYongfJei12cDe+OIveeM3E=; b=a9+184KrPCddehL7ria41VPDXZYTdvAYhCYcXo/tX9akcpTP+r57W6Sdl3XaK3/VdLvPfj FX6ZXpZ6R5ML892o/VxTOF0ndbGaKrmG5HnS2rs7hPI12hTe4jKupCsdjecYEFaU5R0g86 doPYqrbG+zyGxfTCN/9qfWN536vlPC6mL7F2j3fS/lG1BCvFPuwHVhvCvA+YfETpYN+iqD /Wv+kpf8w4AAlIgbOVVgQZ9LSRjquec9xmiu+ucCWo0eOAFmljtvpLi8QI/JqLoCvmyZIz Yqmhgv/U0MNd8LE9pzy8vnWxF9yCSXPUwyW/+vFk2RtY+L7QxS+uNEFT0UyFBg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1729017606; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=68a46Dz0xqZoTJ1bSg2oRYongfJei12cDe+OIveeM3E=; b=BREkziV/3HILfc9OPeG1b2I0JA1QyVw98KeQX1nBzNNQhxipd96eoqSlBEDLDUaUoXGeug YdXa4+sBgahW/NAQ== From: "tip-bot2 for Pavan Kumar Paluri" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/sev] x86/virt: Move SEV-specific parsing into arch/x86/virt/svm Cc: Pavan Kumar Paluri , "Borislav Petkov (AMD)" , Tom Lendacky , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20241014130948.1476946-2-papaluri@amd.com> References: <20241014130948.1476946-2-papaluri@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <172901760612.1442.501863210235242260.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/sev branch of tip: Commit-ID: 4ae47fa7e8f95be17d4ff9c317a1193bbb4a3998 Gitweb: https://git.kernel.org/tip/4ae47fa7e8f95be17d4ff9c317a1193bb= b4a3998 Author: Pavan Kumar Paluri AuthorDate: Mon, 14 Oct 2024 08:09:47 -05:00 Committer: Borislav Petkov (AMD) CommitterDate: Tue, 15 Oct 2024 19:54:42 +02:00 x86/virt: Move SEV-specific parsing into arch/x86/virt/svm Move SEV-specific kernel command line option parsing support from arch/x86/coco/sev/core.c to arch/x86/virt/svm/cmdline.c so that both host and guest related SEV command line options can be supported. No functional changes intended. Signed-off-by: Pavan Kumar Paluri Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Tom Lendacky Link: https://lore.kernel.org/r/20241014130948.1476946-2-papaluri@amd.com --- arch/x86/coco/sev/core.c | 44 +------------------------------ arch/x86/include/asm/sev-common.h | 27 ++++++++++++++++++- arch/x86/virt/svm/Makefile | 1 +- arch/x86/virt/svm/cmdline.c | 33 +++++++++++++++++++++++- 4 files changed, 61 insertions(+), 44 deletions(-) create mode 100644 arch/x86/virt/svm/cmdline.c diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index de1df0c..ff19e80 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -141,33 +141,6 @@ static DEFINE_PER_CPU(struct sev_es_save_area *, sev_v= msa); static DEFINE_PER_CPU(struct svsm_ca *, svsm_caa); static DEFINE_PER_CPU(u64, svsm_caa_pa); =20 -struct sev_config { - __u64 debug : 1, - - /* - * Indicates when the per-CPU GHCB has been created and registered - * and thus can be used by the BSP instead of the early boot GHCB. - * - * For APs, the per-CPU GHCB is created before they are started - * and registered upon startup, so this flag can be used globally - * for the BSP and APs. - */ - ghcbs_initialized : 1, - - /* - * Indicates when the per-CPU SVSM CA is to be used instead of the - * boot SVSM CA. - * - * For APs, the per-CPU SVSM CA is created as part of the AP - * bringup, so this flag can be used globally for the BSP and APs. - */ - use_cas : 1, - - __reserved : 61; -}; - -static struct sev_config sev_cfg __read_mostly; - static __always_inline bool on_vc_stack(struct pt_regs *regs) { unsigned long sp =3D regs->sp; @@ -2374,23 +2347,6 @@ static int __init report_snp_info(void) } arch_initcall(report_snp_info); =20 -static int __init init_sev_config(char *str) -{ - char *s; - - while ((s =3D strsep(&str, ","))) { - if (!strcmp(s, "debug")) { - sev_cfg.debug =3D true; - continue; - } - - pr_info("SEV command-line option '%s' was not recognized\n", s); - } - - return 1; -} -__setup("sev=3D", init_sev_config); - static void update_attest_input(struct svsm_call *call, struct svsm_attest= _call *input) { /* If (new) lengths have been returned, propagate them up */ diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-c= ommon.h index 98726c2..50f5666 100644 --- a/arch/x86/include/asm/sev-common.h +++ b/arch/x86/include/asm/sev-common.h @@ -220,4 +220,31 @@ struct snp_psc_desc { #define GHCB_ERR_INVALID_INPUT 5 #define GHCB_ERR_INVALID_EVENT 6 =20 +struct sev_config { + __u64 debug : 1, + + /* + * Indicates when the per-CPU GHCB has been created and registered + * and thus can be used by the BSP instead of the early boot GHCB. + * + * For APs, the per-CPU GHCB is created before they are started + * and registered upon startup, so this flag can be used globally + * for the BSP and APs. + */ + ghcbs_initialized : 1, + + /* + * Indicates when the per-CPU SVSM CA is to be used instead of the + * boot SVSM CA. + * + * For APs, the per-CPU SVSM CA is created as part of the AP + * bringup, so this flag can be used globally for the BSP and APs. + */ + use_cas : 1, + + __reserved : 61; +}; + +extern struct sev_config sev_cfg; + #endif diff --git a/arch/x86/virt/svm/Makefile b/arch/x86/virt/svm/Makefile index ef2a31b..eca6d71 100644 --- a/arch/x86/virt/svm/Makefile +++ b/arch/x86/virt/svm/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 =20 obj-$(CONFIG_KVM_AMD_SEV) +=3D sev.o +obj-$(CONFIG_CPU_SUP_AMD) +=3D cmdline.o diff --git a/arch/x86/virt/svm/cmdline.c b/arch/x86/virt/svm/cmdline.c new file mode 100644 index 0000000..add4bae --- /dev/null +++ b/arch/x86/virt/svm/cmdline.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * AMD SVM-SEV command line parsing support + * + * Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. + * + * Author: Michael Roth + */ + +#include +#include +#include + +#include + +struct sev_config sev_cfg __read_mostly; + +static int __init init_sev_config(char *str) +{ + char *s; + + while ((s =3D strsep(&str, ","))) { + if (!strcmp(s, "debug")) { + sev_cfg.debug =3D true; + continue; + } + + pr_info("SEV command-line option '%s' was not recognized\n", s); + } + + return 1; +} +__setup("sev=3D", init_sev_config);