From nobody Wed Nov 27 02:36:32 2024 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F8A01E1C33; Tue, 15 Oct 2024 08:57:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728982659; cv=none; b=LcSG8gP/VNf++oZ7+mcQ2tqgNgUuhFsLRBdRV8SX3Kq6znecGnGslSt4glC+KBwGXN96NN/vgyJ9+DWh0as6nV/tq6tE5lqSrDDa/Sui44T4LIE3nikISqEcvQ3DG+Cs238IlWL5I5Klcu9pzEftsH8VoJl00kLwcyW3/THlfKk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728982659; c=relaxed/simple; bh=iy+qQq/pj7K04jQ2kMF/pTLXKOP2XJcYL3zKOASDEYc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=FzvcrIt09Ser4u0ArpRJKvoEvyY3loMztNr3p7kXjkYsvC+eeO7ZsUw5+mlmSsnpCJ+1mNdk5wv81gTWc8Veut9Eiy5ioQgmmF+4ZXl0hcYGThJmr+x26wQe7IE/uJytexdgEEDq9YBqL8X8BZwXcxBEYNPSPe/lQyIuub+I8l0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0590D20168E; Tue, 15 Oct 2024 10:57:37 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C26DD2024D7; Tue, 15 Oct 2024 10:57:36 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 9E883183DC03; Tue, 15 Oct 2024 16:57:34 +0800 (+08) From: Richard Zhu To: kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, lpieralisi@kernel.org, frank.li@nxp.com, l.stach@pengutronix.de, robh+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, krzysztof.kozlowski+dt@linaro.org, festevam@gmail.com, s.hauer@pengutronix.de Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, imx@lists.linux.dev Subject: [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Date: Tue, 15 Oct 2024 16:33:33 +0800 Message-Id: <1728981213-8771-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1728981213-8771-1-git-send-email-hongxing.zhu@nxp.com> References: <1728981213-8771-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add ref clock for i.MX95 PCIe. Signed-off-by: Richard Zhu Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 03661e76550f..5cb504b5f851 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1473,6 +1473,14 @@ smmu: iommu@490d0000 { }; }; =20 + hsio_blk_ctl: syscon@4c0100c0 { + compatible =3D "nxp,imx95-hsio-blk-ctl", "syscon"; + reg =3D <0x0 0x4c0100c0 0x0 0x4>; + #clock-cells =3D <1>; + clocks =3D <&dummy>; + power-domains =3D <&scmi_devpd IMX95_PD_HSIO_TOP>; + }; + pcie0: pcie@4c300000 { compatible =3D "fsl,imx95-pcie"; reg =3D <0 0x4c300000 0 0x10000>, @@ -1500,8 +1508,9 @@ pcie0: pcie@4c300000 { clocks =3D <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =3D<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; @@ -1528,8 +1537,9 @@ pcie0_ep: pcie-ep@4c300000 { clocks =3D <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =3D<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; --=20 2.37.1