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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF00017091.mail.protection.outlook.com (10.167.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8048.13 via Frontend Transport; Wed, 9 Oct 2024 16:28:47 +0000 Received: from SATLEXMB05.amd.com (10.181.40.146) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 9 Oct 2024 11:28:46 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 9 Oct 2024 11:28:45 -0500 Received: from xhdradheys41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Wed, 9 Oct 2024 11:28:41 -0500 From: Radhey Shyam Pandey To: , , , , , , , , CC: , , , , , Abin Joseph , Radhey Shyam Pandey Subject: [PATCH net-next v3 3/3] net: emaclite: Adopt clock support Date: Wed, 9 Oct 2024 21:58:23 +0530 Message-ID: <1728491303-1456171-4-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1728491303-1456171-1-git-send-email-radhey.shyam.pandey@amd.com> References: <1728491303-1456171-1-git-send-email-radhey.shyam.pandey@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: radhey.shyam.pandey@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017091:EE_|SJ2PR12MB9190:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a9199dc-71f7-42c1-1409-08dce87f73c5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2024 16:28:47.9147 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0a9199dc-71f7-42c1-1409-08dce87f73c5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017091.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9190 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Abin Joseph Adapt to use the clock framework. Add s_axi_aclk clock from the processor bus clock domain and make clk optional to keep DTB backward compatibility. Signed-off-by: Abin Joseph Signed-off-by: Radhey Shyam Pandey Reviewed-by: Simon Horman --- Changes for v3: - Remove braces around dev_err_probe(). Changes for v2: - None --- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/et= hernet/xilinx/xilinx_emaclite.c index 418587942527..ecf47107146d 100644 --- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c +++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c @@ -7,6 +7,7 @@ * Copyright (c) 2007 - 2013 Xilinx, Inc. */ =20 +#include #include #include #include @@ -1091,6 +1092,7 @@ static int xemaclite_of_probe(struct platform_device = *ofdev) struct net_device *ndev =3D NULL; struct net_local *lp =3D NULL; struct device *dev =3D &ofdev->dev; + struct clk *clkin; =20 int rc =3D 0; =20 @@ -1127,6 +1129,11 @@ static int xemaclite_of_probe(struct platform_device= *ofdev) lp->tx_ping_pong =3D get_bool(ofdev, "xlnx,tx-ping-pong"); lp->rx_ping_pong =3D get_bool(ofdev, "xlnx,rx-ping-pong"); =20 + clkin =3D devm_clk_get_optional_enabled(&ofdev->dev, NULL); + if (IS_ERR(clkin)) + return dev_err_probe(&ofdev->dev, PTR_ERR(clkin), + "Failed to get and enable clock from Device Tree\n"); + rc =3D of_get_ethdev_address(ofdev->dev.of_node, ndev); if (rc) { dev_warn(dev, "No MAC address found, using random\n"); --=20 2.34.1