From nobody Fri Nov 29 08:41:32 2024 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B16553373; Tue, 24 Sep 2024 03:50:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727149838; cv=none; b=EFieYhrm+EuREvmnbJr3Iuwnmp9xr2h5Qa1MAJcHAdLTG39lyd2rytkOEN6h44biju7EZbGk5z76jJJccbrnYQMcUGb55yVwJqvogMCUc7f7i0Ca4jDk6iqI5wLOb0pluy1282iBdFfc2ngfv+YXSpo/HIFRtcBtC27RAGnWAXg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727149838; c=relaxed/simple; bh=Id0QWNRJ07QIW+k0f3ROqnkVTaEdzgVXxKTBSEnj5Kk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=MjvlywtGrkBXX8hKXpRit+psmrsOLrgb9R6n7Z0YrkzAdYqk+LwKqWqfDyp4viLbld35Cksl5YAW8XnjS6ZhYQ0sZjpHLqd2v5UHUFm9gxZNrBTF6ghxeA7mqSOxmWu0ZDnHqOJ24gdWV4SdUcrYR3WFiyscV1PtBRoX2UXxAjw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 50A202007E0; Tue, 24 Sep 2024 05:50:35 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 174482006D1; Tue, 24 Sep 2024 05:50:35 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 10BAB183DC02; Tue, 24 Sep 2024 11:50:32 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, kwilczynski@kernel.org, bhelgaas@google.com, lpieralisi@kernel.org, frank.li@nxp.com, robh+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, krzysztof.kozlowski+dt@linaro.org, festevam@gmail.com, s.hauer@pengutronix.de Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, imx@lists.linux.dev, Richard Zhu Subject: [PATCH v1 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Date: Tue, 24 Sep 2024 11:27:44 +0800 Message-Id: <1727148464-14341-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1727148464-14341-1-git-send-email-hongxing.zhu@nxp.com> References: <1727148464-14341-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add ref clock for i.MX95 PCIe. Signed-off-by: Richard Zhu Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 1bbf9a0468f6..e66be264c2f2 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -221,6 +221,13 @@ core5 { }; }; =20 + clk_dummy: clock-dummy { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <0>; + clock-output-names =3D "clk_dummy"; + }; + clk_ext1: clock-ext1 { compatible =3D "fixed-clock"; #clock-cells =3D <0>; @@ -1055,6 +1062,14 @@ smmu: iommu@490d0000 { }; }; =20 + hsio_blk_ctl: syscon@4c0100c0 { + compatible =3D "nxp,imx95-hsio-blk-ctl", "syscon"; + reg =3D <0x0 0x4c0100c0 0x0 0x4>; + #clock-cells =3D <1>; + power-domains =3D <&scmi_devpd IMX95_PD_HSIO_TOP>; + clocks =3D <&clk_dummy>; + }; + pcie0: pcie@4c300000 { compatible =3D "fsl,imx95-pcie"; reg =3D <0 0x4c300000 0 0x10000>, @@ -1082,8 +1097,9 @@ pcie0: pcie@4c300000 { clocks =3D <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =3D<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; @@ -1149,8 +1165,9 @@ pcie1: pcie@4c380000 { clocks =3D <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names =3D "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =3D<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; --=20 2.37.1