From nobody Wed Oct 30 22:11:52 2024 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DF8F1BC060; Thu, 1 Aug 2024 16:35:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722530136; cv=none; b=nYfqVK1FbsJdb6ZRZtf8B+oQmwaXNEwozlfWw5Po2eeR7YRJCdtKehmQ2Y2xIpj8N2QanwZv4mFO03uOsYNOrXOCARsAe92ZGb1GZyZZvilcQ3XtV7IfhpSwSLE9qjclx5I0W8LFp5gd1X6JNUFLxDfoJn9YGxBwl+aufcAdc64= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722530136; c=relaxed/simple; bh=WXn7pOenmYmXNoEcz3FhCvEWXffdAen5E7ABGq4QHfg=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=qY/HLYRnaeyqnO/tti/CRyOaZbsiY88K0PaAUolcUkGpt4lfjvFA2AsbYKl3JT4prKUN/S3EyiJenw6ENwV78jqDCijyoTpUabPtvebr/3A4DHYFZS43tTN0zdpWNoVzj9voT2YkSjJrDJ/mIxvpIRp+KvwyQh+G6Kq1r6OUBC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=cP6jbr9K; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=X5b/kltB; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="cP6jbr9K"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="X5b/kltB" Date: Thu, 01 Aug 2024 16:35:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1722530132; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ANfngnPqKOP1wy0WOpKzHct1SOebYBS90PN5GKa40V4=; b=cP6jbr9KYdF31NtLyPpJnPtvZ6CSZYes870uqXY2hNfLDr61NxGdDoWuv5rVkba77svcpL VWCX63fPE+uMOZIZ2SRfbLGQsLB3SiAwaEf39c7myMy5apYjlNIV1ZHvVpQ8jtfM/CpUqO Q0kbvLRgsUhBTWVvQRUI4jSIGa3GTnMkKr2GJ7IKmecQ93lWauvrUaGtVmVBFCANpkZitg xtDRcBRk9f5tqzTNOqw2IxhPyLu0+sn65rwnLqZ2dZfKulA6reHhQGe8w43irRKFJjybiP JYfmPPhcTQFHEkmQLYUQA3T2trLuKZHs5Bq24lKJVxWX5bNBKLu6ZK2CBb8jew== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1722530132; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ANfngnPqKOP1wy0WOpKzHct1SOebYBS90PN5GKa40V4=; b=X5b/kltBgLLuMog4Or9vZISiNKbvDO7pXZrR0MWUO9H0EJ36pkw+RKvblYuz1qIzff+aBj dTLD/BRyNIzmy5Aw== From: "tip-bot2 for Yazen Ghannam" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: ras/core] x86/mce: Rename mce_setup() to mce_prep_record() Cc: Borislav Petkov , Yazen Ghannam , Nikolay Borisov , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240730182958.4117158-2-yazen.ghannam@amd.com> References: <20240730182958.4117158-2-yazen.ghannam@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <172253013173.2215.13005247955088150446.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the ras/core branch of tip: Commit-ID: 5ad21a2497329c2b090d5b02b95394a1316bef53 Gitweb: https://git.kernel.org/tip/5ad21a2497329c2b090d5b02b95394a13= 16bef53 Author: Yazen Ghannam AuthorDate: Tue, 30 Jul 2024 13:29:56 -05:00 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 01 Aug 2024 18:20:24 +02:00 x86/mce: Rename mce_setup() to mce_prep_record() There is no MCE "setup" done in mce_setup(). Rather, this function initiali= zes and prepares an MCE record. Rename the function to highlight what it does. No functional change is intended. Suggested-by: Borislav Petkov Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Nikolay Borisov Link: https://lore.kernel.org/r/20240730182958.4117158-2-yazen.ghannam@amd.= com Signed-off-by: Borislav Petkov (AMD) --- arch/x86/include/asm/mce.h | 2 +- arch/x86/kernel/cpu/mce/amd.c | 2 +- arch/x86/kernel/cpu/mce/apei.c | 4 ++-- arch/x86/kernel/cpu/mce/core.c | 6 +++--- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 3ad29b1..3b99701 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -221,7 +221,7 @@ static inline int apei_smca_report_x86_error(struct cpe= r_ia_proc_ctx *ctx_info, u64 lapic_id) { return -EINVAL; } #endif =20 -void mce_setup(struct mce *m); +void mce_prep_record(struct mce *m); void mce_log(struct mce *m); DECLARE_PER_CPU(struct device *, mce_device); =20 diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 9a0133e..14bf8c2 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -780,7 +780,7 @@ static void __log_error(unsigned int bank, u64 status, = u64 addr, u64 misc) { struct mce m; =20 - mce_setup(&m); + mce_prep_record(&m); =20 m.status =3D status; m.misc =3D misc; diff --git a/arch/x86/kernel/cpu/mce/apei.c b/arch/x86/kernel/cpu/mce/apei.c index 7f7309f..8f509c8 100644 --- a/arch/x86/kernel/cpu/mce/apei.c +++ b/arch/x86/kernel/cpu/mce/apei.c @@ -44,7 +44,7 @@ void apei_mce_report_mem_error(int severity, struct cper_= sec_mem_err *mem_err) else lsb =3D PAGE_SHIFT; =20 - mce_setup(&m); + mce_prep_record(&m); m.bank =3D -1; /* Fake a memory read error with unknown channel */ m.status =3D MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | MCI_STAT= US_MISCV | 0x9f; @@ -97,7 +97,7 @@ int apei_smca_report_x86_error(struct cper_ia_proc_ctx *c= tx_info, u64 lapic_id) if (ctx_info->reg_arr_size < 48) return -EINVAL; =20 - mce_setup(&m); + mce_prep_record(&m); =20 m.extcpu =3D -1; m.socketid =3D -1; diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index b85ec7a..dd5192e 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -118,7 +118,7 @@ static struct irq_work mce_irq_work; BLOCKING_NOTIFIER_HEAD(x86_mce_decoder_chain); =20 /* Do initial initialization of a struct mce */ -void mce_setup(struct mce *m) +void mce_prep_record(struct mce *m) { memset(m, 0, sizeof(struct mce)); m->cpu =3D m->extcpu =3D smp_processor_id(); @@ -436,11 +436,11 @@ static noinstr void mce_wrmsrl(u32 msr, u64 v) static noinstr void mce_gather_info(struct mce *m, struct pt_regs *regs) { /* - * Enable instrumentation around mce_setup() which calls external + * Enable instrumentation around mce_prep_record() which calls external * facilities. */ instrumentation_begin(); - mce_setup(m); + mce_prep_record(m); instrumentation_end(); =20 m->mcgstatus =3D mce_rdmsrl(MSR_IA32_MCG_STATUS);